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author | Jens Arnold <amiconn@rockbox.org> | 2006-11-09 07:31:31 +0000 |
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committer | Jens Arnold <amiconn@rockbox.org> | 2006-11-09 07:31:31 +0000 |
commit | ad70a9b2e602f41d7608d3c3ca58fc897c8c39b8 (patch) | |
tree | 8e1c47e619a5b1e56b1591a86ae43418ec18851f /firmware/target/sh/archos/lcd-as-archos-bitmap.S | |
parent | fd0e640eddcabdc5f5d8dc397df01be69738be37 (diff) | |
download | rockbox-ad70a9b2e602f41d7608d3c3ca58fc897c8c39b8.tar.gz rockbox-ad70a9b2e602f41d7608d3c3ca58fc897c8c39b8.zip |
Moved archos LCD aseembler code to target tree.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11478 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/sh/archos/lcd-as-archos-bitmap.S')
-rwxr-xr-x | firmware/target/sh/archos/lcd-as-archos-bitmap.S | 211 |
1 files changed, 211 insertions, 0 deletions
diff --git a/firmware/target/sh/archos/lcd-as-archos-bitmap.S b/firmware/target/sh/archos/lcd-as-archos-bitmap.S new file mode 100755 index 0000000000..bef231c3c7 --- /dev/null +++ b/firmware/target/sh/archos/lcd-as-archos-bitmap.S | |||
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1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2004 by Jens Arnold | ||
11 | * Based on the work of Alan Korr and Jörg Hohensohn | ||
12 | * | ||
13 | * All files in this archive are subject to the GNU General Public License. | ||
14 | * See the file COPYING in the source tree root for full license agreement. | ||
15 | * | ||
16 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
17 | * KIND, either express or implied. | ||
18 | * | ||
19 | ****************************************************************************/ | ||
20 | |||
21 | #include "config.h" | ||
22 | #include "cpu.h" | ||
23 | |||
24 | #define LCDR (PBDR_ADDR+1) | ||
25 | |||
26 | #define LCD_SD 1 /* PB0 = 1 --- 0001 */ | ||
27 | #define LCD_SC 2 /* PB1 = 1 --- 0010 */ | ||
28 | #define LCD_DS 4 /* PB2 = 1 --- 0100 */ | ||
29 | #define LCD_CS 8 /* PB3 = 1 --- 1000 */ | ||
30 | |||
31 | /* | ||
32 | * About /CS,DS,SC,SD | ||
33 | * ------------------ | ||
34 | * | ||
35 | * LCD on JBP and JBR uses a SPI protocol to receive orders (SDA and SCK lines) | ||
36 | * | ||
37 | * - /CS -> Chip Selection line : | ||
38 | * 0 : LCD chipset is activated. | ||
39 | * - DS -> Data Selection line, latched at the rising edge | ||
40 | * of the 8th serial clock (*) : | ||
41 | * 0 : instruction register, | ||
42 | * 1 : data register; | ||
43 | * - SC -> Serial Clock line (SDA). | ||
44 | * - SD -> Serial Data line (SCK), latched at the rising edge | ||
45 | * of each serial clock (*). | ||
46 | * | ||
47 | * _ _ | ||
48 | * /CS \ / | ||
49 | * \______________________________________________________/ | ||
50 | * _____ ____ ____ ____ ____ ____ ____ ____ ____ _____ | ||
51 | * SD \/ D7 \/ D6 \/ D5 \/ D4 \/ D3 \/ D2 \/ D1 \/ D0 \/ | ||
52 | * _____/\____/\____/\____/\____/\____/\____/\____/\____/\_____ | ||
53 | * | ||
54 | * _____ _ _ _ _ _ _ _ ________ | ||
55 | * SC \ * \ * \ * \ * \ * \ * \ * \ * | ||
56 | * \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/ | ||
57 | * _ _________________________________________________________ | ||
58 | * DS \/ | ||
59 | * _/\_________________________________________________________ | ||
60 | * | ||
61 | */ | ||
62 | |||
63 | .section .icode,"ax",@progbits | ||
64 | |||
65 | .align 2 | ||
66 | .global _lcd_write_command | ||
67 | .type _lcd_write_command,@function | ||
68 | |||
69 | /* Write a command byte to the lcd controller | ||
70 | * | ||
71 | * Arguments: | ||
72 | * r4 - data byte (int) | ||
73 | * | ||
74 | * Register usage: | ||
75 | * r0 - scratch | ||
76 | * r1 - data byte (copied) | ||
77 | * r2 - precalculated port value (CS, DS and SC low, SD high), | ||
78 | * negated (neg)! | ||
79 | * r3 - lcd port address | ||
80 | * r5 - 1 (byte count for reuse of the loop in _lcd_write_data) | ||
81 | */ | ||
82 | |||
83 | _lcd_write_command: | ||
84 | mov.l .lcdr,r3 /* put lcd data port address in r3 */ | ||
85 | mov r4,r1 /* copy data byte to r1 */ | ||
86 | mov #1,r5 /* set byte count to 1 (!) */ | ||
87 | |||
88 | /* This code will fail if an interrupt changes the contents of PBDRL. | ||
89 | * If so, we must disable the interrupt here. */ | ||
90 | |||
91 | mov.b @r3,r0 /* r0 = PBDRL */ | ||
92 | or #(LCD_SD),r0 /* r0 |= LCD_SD */ | ||
93 | and #(~(LCD_CS|LCD_DS|LCD_SC)),r0 /* r0 &= ~(LCD_CS|LCD_DS|LCD_SC) */ | ||
94 | |||
95 | bra .single_transfer /* jump into the transfer loop */ | ||
96 | neg r0,r2 /* r2 = 0 - r0 */ | ||
97 | |||
98 | |||
99 | .align 2 | ||
100 | .global _lcd_write_data | ||
101 | .type _lcd_write_data,@function | ||
102 | |||
103 | |||
104 | /* A high performance function to write data to the display, | ||
105 | * one or multiple bytes. | ||
106 | * | ||
107 | * Arguments: | ||
108 | * r4 - data address | ||
109 | * r5 - byte count | ||
110 | * | ||
111 | * Register usage: | ||
112 | * r0 - scratch | ||
113 | * r1 - current data byte | ||
114 | * r2 - precalculated port value (CS and SC low, DS and SD high), | ||
115 | * negated (neg)! | ||
116 | * r3 - lcd port address | ||
117 | */ | ||
118 | |||
119 | _lcd_write_data: | ||
120 | mov.l .lcdr,r3 /* put lcd data port address in r3 */ | ||
121 | nop /* align here */ | ||
122 | |||
123 | /* This code will fail if an interrupt changes the contents of PBDRL. | ||
124 | * If so, we must disable the interrupt here. If disabling interrupts | ||
125 | * for a long time (~9200 clks = ~830 µs for transferring 112 bytes on | ||
126 | * recorders)is undesirable, the loop has to be rewritten to | ||
127 | * disable/precalculate/transfer/enable for each iteration. However, | ||
128 | * this would significantly decrease performance. */ | ||
129 | |||
130 | mov.b @r3,r0 /* r0 = PBDRL */ | ||
131 | or #(LCD_DS|LCD_SD),r0 /* r0 |= LCD_DS|LCD_SD */ | ||
132 | and #(~(LCD_CS|LCD_SC)),r0 /* r0 &= ~(LCD_CS|LCD_SC) */ | ||
133 | neg r0,r2 /* r2 = 0 - r0 */ | ||
134 | |||
135 | /* loop exploits that SD is on bit 0 for recorders and Ondios */ | ||
136 | |||
137 | .align 2 | ||
138 | .multi_transfer: | ||
139 | mov.b @r4+,r1 /* load data byte from memory */ | ||
140 | nop | ||
141 | |||
142 | .single_transfer: | ||
143 | shll16 r1 /* shift data to most significant byte */ | ||
144 | shll8 r1 | ||
145 | not r1,r1 /* and invert for use with negc */ | ||
146 | |||
147 | shll r1 /* shift the MSB into carry */ | ||
148 | negc r2,r0 /* carry to SD, SC low */ | ||
149 | shll r1 /* next shift here for alignment */ | ||
150 | mov.b r0,@r3 /* set data to port */ | ||
151 | or #(LCD_SC),r0 /* rise SC (independent of SD level) */ | ||
152 | mov.b r0,@r3 /* set to port */ | ||
153 | |||
154 | negc r2,r0 | ||
155 | mov.b r0,@r3 | ||
156 | or #(LCD_SC),r0 | ||
157 | mov.b r0,@r3 | ||
158 | |||
159 | shll r1 | ||
160 | negc r2,r0 | ||
161 | shll r1 | ||
162 | mov.b r0,@r3 | ||
163 | or #(LCD_SC),r0 | ||
164 | mov.b r0,@r3 | ||
165 | |||
166 | negc r2,r0 | ||
167 | mov.b r0,@r3 | ||
168 | or #(LCD_SC),r0 | ||
169 | mov.b r0,@r3 | ||
170 | |||
171 | shll r1 | ||
172 | negc r2,r0 | ||
173 | shll r1 | ||
174 | mov.b r0,@r3 | ||
175 | or #(LCD_SC),r0 | ||
176 | mov.b r0,@r3 | ||
177 | |||
178 | negc r2,r0 | ||
179 | mov.b r0,@r3 | ||
180 | or #(LCD_SC),r0 | ||
181 | mov.b r0,@r3 | ||
182 | |||
183 | shll r1 | ||
184 | negc r2,r0 | ||
185 | shll r1 | ||
186 | mov.b r0,@r3 | ||
187 | or #(LCD_SC),r0 | ||
188 | mov.b r0,@r3 | ||
189 | |||
190 | negc r2,r0 | ||
191 | mov.b r0,@r3 | ||
192 | or #(LCD_SC),r0 | ||
193 | mov.b r0,@r3 | ||
194 | |||
195 | add #-1,r5 /* decrease byte count */ | ||
196 | tst r5,r5 /* r5 == 0 ? */ | ||
197 | bf .multi_transfer /* no: next iteration */ | ||
198 | |||
199 | or #(LCD_CS|LCD_DS|LCD_SD|LCD_SC),r0 /* restore port */ | ||
200 | rts | ||
201 | mov.b r0,@r3 | ||
202 | |||
203 | /* This is the place to reenable the interrupts, if we have disabled | ||
204 | * them. See above. */ | ||
205 | |||
206 | .align 2 | ||
207 | .lcdr: | ||
208 | .long LCDR | ||
209 | |||
210 | .end: | ||
211 | .size _lcd_write_command,.end-_lcd_write_command | ||