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authorJens Arnold <amiconn@rockbox.org>2008-01-09 23:48:26 +0000
committerJens Arnold <amiconn@rockbox.org>2008-01-09 23:48:26 +0000
commit6a56c14e17f6ba113ec0d4d40e75bffd61b293cc (patch)
tree64bcdd8d5d4afa2ca6dd1aa0976cdafa9a346b26 /firmware/target/sh/archos/lcd-as-archos-bitmap.S
parent75380fd27d175bab1818ef35a9100e74fc6a461b (diff)
downloadrockbox-6a56c14e17f6ba113ec0d4d40e75bffd61b293cc.tar.gz
rockbox-6a56c14e17f6ba113ec0d4d40e75bffd61b293cc.zip
Greyscale library: Changed the internal data format once more (separated pixel values and phases), allowing for further optimisation of drawing, scrolling etc. * Optimised grey phase blitting in the core reduces CPU load on all architectures, most significantly on coldfire. Previous version was too slow to keep up at 45MHz, leading to unwanted graininess (update frequency was halved). Also fixed screendump on 2bpp targets with vertical pixel packing.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16043 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/sh/archos/lcd-as-archos-bitmap.S')
-rw-r--r--firmware/target/sh/archos/lcd-as-archos-bitmap.S125
1 files changed, 58 insertions, 67 deletions
diff --git a/firmware/target/sh/archos/lcd-as-archos-bitmap.S b/firmware/target/sh/archos/lcd-as-archos-bitmap.S
index 492413fdb7..a60ea9aad1 100644
--- a/firmware/target/sh/archos/lcd-as-archos-bitmap.S
+++ b/firmware/target/sh/archos/lcd-as-archos-bitmap.S
@@ -210,28 +210,35 @@ _lcd_write_data:
210 * one or multiple pixels. 210 * one or multiple pixels.
211 * 211 *
212 * Arguments: 212 * Arguments:
213 * r4 - data address, (phase,value)-pairs 213 * r4 - pixel value data address
214 * r5 - pixel block count 214 * r5 - pixel phase data address
215 * r6 - pixel block count
215 * 216 *
216 * Register usage: 217 * Register usage:
217 * r0 - current pixel value 218 * r0 - scratch / phase signs mask
218 * r1 - scratch 219 * r1 - scratch
219 * r2 - precalculated port value (CS and SC low, DS and SD high), 220 * r2 - precalculated port value (CS and SC low, DS and SD high),
220 * negated (neg)! 221 * negated (neg)!
221 * r3 - lcd port address 222 * r3 - lcd port address
222 * r5 - end address 223 * r4 - current value address
223 * r6/r7 - current/next pixel phase 224 * r5 - current phase address
224 * r8 - current block address (for writing back phase) 225 * r6 - end address
225 * r9 - 0x80 (for phase modification) 226 * r7/r8 - current/next pixel phase
227 * r9 - current pixel value
228 * r10 - 0x00000080 \
229 * r11 - 0x00008000 > for phase sign check
230 * r12 - 0x00800000 /
226 */ 231 */
227 232
228_lcd_grey_data: 233_lcd_grey_data:
229 mov.l r8, @-r15 /* save r8 */ 234 mov.l r8, @-r15 /* save r8 */
230 shll2 r5 /* v */ 235 shll2 r6 /* v */
231 mov.l r9, @-r15 /* save r9 */ 236 mov.l r9, @-r15 /* save r9 */
232 shll2 r5 /* r5 *= 16; (8 pixel per block * 2 bytes/pixel) */ 237 shll r6 /* r6 *= 8; (8 pixels per block) */
238 mov.l r10, @-r15 /* save r10 */
239 add r4, r6 /* end address */
233 mov.l .lcdr, r3 /* put lcd data port address in r3 */ 240 mov.l .lcdr, r3 /* put lcd data port address in r3 */
234 add r4, r5 /* end address */ 241 nop /* keep alignment */
235 242
236 /* This code will fail if an interrupt changes the contents of PBDRL. 243 /* This code will fail if an interrupt changes the contents of PBDRL.
237 * If so, we must disable the interrupt here. If disabling interrupts 244 * If so, we must disable the interrupt here. If disabling interrupts
@@ -240,110 +247,90 @@ _lcd_grey_data:
240 * this would significantly decrease performance. */ 247 * this would significantly decrease performance. */
241 248
242 mov.b @r3, r0 /* r0 = PBDRL */ 249 mov.b @r3, r0 /* r0 = PBDRL */
243 mov #0x80, r9 /* for phase modification - "or #imm,xx" only allows r0 */
244 mov.b @r4+, r6 /* fetch first pixel phase */
245 or #(LCD_DS|LCD_SD), r0 /* r0 |= LCD_DS|LCD_SD */ 250 or #(LCD_DS|LCD_SD), r0 /* r0 |= LCD_DS|LCD_SD */
251 mov.l r11, @-r15 /* save r11 */
246 and #(~(LCD_CS|LCD_SC)), r0 /* r0 &= ~(LCD_CS|LCD_SC) */ 252 and #(~(LCD_CS|LCD_SC)), r0 /* r0 &= ~(LCD_CS|LCD_SC) */
253 mov.l r12, @-r15 /* save r12 */
247 neg r0, r2 /* r2 = 0 - r0 */ 254 neg r0, r2 /* r2 = 0 - r0 */
248 mov #-3, r0 /* offset for storing phase */
249 255
250 /* loop exploits that SD is on bit 0 for recorders and Ondios */ 256 /* loop exploits that SD is on bit 0 for recorders and Ondios */
251 257
252.greyloop: 258 mov.w .ptest, r10
253 cmp/pz r6 /* phase non-negative? */ 259 swap.b r10, r11
254 mov.b @r4+, r8 /* fetch pixel value */ 260 mov.l @r5, r7
255 negc r2, r1 /* T -> SD, SC low */ 261 swap.w r10, r12
256 mov.b r1, @r3 /* set port */ 262 mov.l .pmask, r0
257 or r9, r6 /* r6 -= (r6 >= 0) ? 128 : 0; */
258 mov.b @r4+, r7 /* fetch next pixel phase */
259 add #(LCD_SC), r1 /* rise SC */
260 mov.b r1, @r3 /* set port */
261 add r8, r6 /* calculate new phase */
262 mov.b r6, @(r0,r4) /* store phase */
263 263
264.greyloop:
264 cmp/pz r7 265 cmp/pz r7
265 mov.b @r4+, r8 266 mov.l @r4+, r9
266 negc r2, r1 267 negc r2, r1
267 mov.b r1, @r3 268 mov.b r1, @r3
268 or r9, r7
269 mov.b @r4+, r6
270 add #(LCD_SC), r1 269 add #(LCD_SC), r1
271 mov.b r1, @r3 270 mov.b r1, @r3
272 add r8, r7
273 mov.b r7, @(r0,r4)
274 271
275 cmp/pz r6 272 tst r12, r7
276 mov.b @r4+, r8 273 mov.l @(4,r5), r8
277 negc r2, r1 274 negc r2, r1
278 mov.b r1, @r3 275 mov.b r1, @r3
279 or r9, r6
280 mov.b @r4+, r7
281 add #(LCD_SC), r1 276 add #(LCD_SC), r1
282 mov.b r1, @r3 277 mov.b r1, @r3
283 add r8, r6
284 mov.b r6, @(r0,r4)
285 278
286 cmp/pz r7 279 tst r11, r7
287 mov.b @r4+, r8
288 negc r2, r1 280 negc r2, r1
281 tst r10, r7
289 mov.b r1, @r3 282 mov.b r1, @r3
290 or r9, r7
291 mov.b @r4+, r6
292 add #(LCD_SC), r1 283 add #(LCD_SC), r1
293 mov.b r1, @r3 284 mov.b r1, @r3
294 add r8, r7
295 mov.b r7, @(r0,r4)
296 285
297 cmp/pz r6 286 or r0, r7
298 mov.b @r4+, r8 287 sub r9, r7
299 negc r2, r1 288 negc r2, r1
300 mov.b r1, @r3 289 mov.b r1, @r3
301 or r9, r6
302 mov.b @r4+, r7
303 add #(LCD_SC), r1 290 add #(LCD_SC), r1
304 mov.b r1, @r3 291 mov.b r1, @r3
305 add r8, r6
306 mov.b r6, @(r0,r4)
307 292
308 cmp/pz r7 293 cmp/pz r8
309 mov.b @r4+, r8 294 mov.l r7, @r5
310 negc r2, r1 295 negc r2, r1
311 mov.b r1, @r3 296 mov.b r1, @r3
312 or r9, r7
313 mov.b @r4+, r6
314 add #(LCD_SC), r1 297 add #(LCD_SC), r1
315 mov.b r1, @r3 298 mov.b r1, @r3
316 add r8, r7
317 mov.b r7, @(r0,r4)
318 299
319 cmp/pz r6 300 tst r12, r8
320 mov.b @r4+, r8 301 mov.l @r4+, r9
321 negc r2, r1 302 negc r2, r1
322 mov.b r1, @r3 303 mov.b r1, @r3
323 or r9, r6
324 mov.b @r4+, r7
325 add #(LCD_SC), r1 304 add #(LCD_SC), r1
326 mov.b r1, @r3 305 mov.b r1, @r3
327 add r8, r6
328 mov.b r6, @(r0,r4)
329 306
330 cmp/pz r7 307 tst r11, r8
331 mov.b @r4+, r8 308 mov.l @(8,r5), r7
332 negc r2, r1 309 negc r2, r1
333 mov.b r1, @r3 310 mov.b r1, @r3
334 or r9, r7
335 mov.b @r4+, r6
336 add #(LCD_SC), r1 311 add #(LCD_SC), r1
337 mov.b r1, @r3 312 mov.b r1, @r3
338 add r8, r7
339 mov.b r7, @(r0,r4)
340 313
341 cmp/hi r4, r5 /* some blocks left? */ 314 tst r10, r8
315 or r0, r8
316 negc r2, r1
317 mov.b r1, @r3
318 add #(LCD_SC), r1
319 mov.b r1, @r3
320
321 sub r9, r8
322 mov.l r8, @(4,r5)
323
324 add #8, r5
325 cmp/hi r4, r6
342 bt .greyloop 326 bt .greyloop
343 327
328 mov.l @r15+, r12 /* restore r12 */
344 mov #(LCD_CS|LCD_DS|LCD_SD|LCD_SC), r0 329 mov #(LCD_CS|LCD_DS|LCD_SD|LCD_SC), r0
345 mov.l @r15+, r9 /* restore r9 */ 330 mov.l @r15+, r11 /* restore r11 */
346 or r0, r1 /* restore port */ 331 or r0, r1 /* restore port */
332 mov.l @r15+, r10 /* restore r10 */
333 mov.l @r15+, r9 /* restore r9 */
347 mov.l @r15+, r8 /* restore r8 */ 334 mov.l @r15+, r8 /* restore r8 */
348 rts 335 rts
349 mov.b r1, @r3 336 mov.b r1, @r3
@@ -351,7 +338,11 @@ _lcd_grey_data:
351 /* This is the place to reenable the interrupts, if we have disabled 338 /* This is the place to reenable the interrupts, if we have disabled
352 * them. See above. */ 339 * them. See above. */
353 340
341.ptest:
342 .short 0x0080
354 343
355 .align 2 344 .align 2
356.lcdr: 345.lcdr:
357 .long LCDR 346 .long LCDR
347.pmask:
348 .long 0x80808080