FiiO M3K/X1000: Do system clock initialization in the SPL

Initializing the clocks in the SPL brings Rockbox in line with
how the FiiO M3K's original SPL works. It's likely other X1000
devices do this too.

There was a logic error in the previous setup: the code falsely
assumed that DDR memory would always be running from MPLL, but
it would be switched to APLL by the bootloader. Rockbox would
then try to re-init APLL, albeit with the same parameters. Maybe
this was the cause of the boot hang on some units.

Change-Id: I64064585e491bbdf1e95fe9428c91a9314f2a917

1 files changed, 7 insertions, 1 deletions

diff --git a/firmware/target/mips/ingenic_x1000/spl-x1000.h b/firmware/target/mips/ingenic_x1000/spl-x1000.h
index 44601438f3..d2255a8d05 100644
--- a/firmware/target/mips/ingenic_x1000/spl-x1000.h
+++ b/firmware/target/mips/ingenic_x1000/spl-x1000.h
@@ -39,11 +39,17 @@ struct spl_boot_option {
 extern const struct spl_boot_option spl_boot_options[];
 
 /* Called on a fatal error */
-void spl_error(void) __attribute__((noreturn));
+extern void spl_error(void) __attribute__((noreturn));
 
 /* When SPL boots with SPL_BOOTOPTION_CHOOSE, this function is invoked
  * to let the target figure out the boot option based on buttons the
  * user is pressing */
 extern int spl_get_boot_option(void);
 
+/* Do any setup/initialization needed for the given boot option, this
+ * will be called right before flushing caches + jumping to the image.
+ * Typical use is to set up system clocks, etc.
+ */
+extern void spl_handle_pre_boot(int bootopt);
+
 #endif /* __SPL_X1000_H__ */