summaryrefslogtreecommitdiff
path: root/firmware/target/mips/ingenic_x1000/sfc-x1000.c
diff options
context:
space:
mode:
authorAidan MacDonald <amachronic@protonmail.com>2021-04-28 02:32:47 +0100
committerAidan MacDonald <amachronic@protonmail.com>2021-04-28 20:04:10 +0100
commit16a1993cadfb3da9df25d5436ebf355ed31cc5b1 (patch)
tree2a0097ff1683471cb2fc156f248c8043bb6d2116 /firmware/target/mips/ingenic_x1000/sfc-x1000.c
parent423fcf951a12178c6a4060a72a00aa722330aca1 (diff)
downloadrockbox-16a1993cadfb3da9df25d5436ebf355ed31cc5b1.tar.gz
rockbox-16a1993cadfb3da9df25d5436ebf355ed31cc5b1.zip
x1000: Remove some #ifdef SPL in the sfc/nand code
Change-Id: I554d590bfa700e521a74b5216e09f9673902d676
Diffstat (limited to 'firmware/target/mips/ingenic_x1000/sfc-x1000.c')
-rw-r--r--firmware/target/mips/ingenic_x1000/sfc-x1000.c30
1 files changed, 9 insertions, 21 deletions
diff --git a/firmware/target/mips/ingenic_x1000/sfc-x1000.c b/firmware/target/mips/ingenic_x1000/sfc-x1000.c
index 4a79be849e..3f1cb25f07 100644
--- a/firmware/target/mips/ingenic_x1000/sfc-x1000.c
+++ b/firmware/target/mips/ingenic_x1000/sfc-x1000.c
@@ -33,18 +33,6 @@
33 * simple, DMA is unconditionally disabled. */ 33 * simple, DMA is unconditionally disabled. */
34//#define NEED_SFC_DMA 34//#define NEED_SFC_DMA
35 35
36#if defined(BOOTLOADER_SPL)
37# if X1000_EXCLK_FREQ == 24000000
38# define FIXED_CLK_FREQ 600000000
39# define FIXED_CLK_SRC X1000_CLK_MPLL
40# elif X1000_EXCLK_FREQ == 26000000
41# define FIXED_CLK_FREQ 598000000
42# define FIXED_CLK_SRC X1000_CLK_MPLL
43# else
44# error "bad EXCLK freq"
45# endif
46#endif
47
48#define FIFO_THRESH 31 36#define FIFO_THRESH 31
49 37
50#define SFC_STATUS_PENDING (-1) 38#define SFC_STATUS_PENDING (-1)
@@ -111,16 +99,16 @@ void sfc_close(void)
111 jz_writef(CPM_CLKGR, SFC(1)); 99 jz_writef(CPM_CLKGR, SFC(1));
112} 100}
113 101
114void sfc_set_clock(x1000_clk_t clksrc, uint32_t freq) 102void sfc_set_clock(uint32_t freq)
115{ 103{
116 uint32_t in_freq; 104 /* TODO: This is a hack so we can use MPLL in the SPL.
117#ifdef FIXED_CLK_FREQ 105 * There must be a better way to do this... */
118 /* Small optimization to save code space in SPL by not polling clock */ 106 x1000_clk_t clksrc = X1000_CLK_MPLL;
119 clksrc = FIXED_CLK_SRC; 107 uint32_t in_freq = clk_get(clksrc);
120 in_freq = FIXED_CLK_FREQ; 108 if(in_freq < freq) {
121#else 109 clksrc = X1000_CLK_SCLK_A;
122 in_freq = clk_get(clksrc); 110 in_freq = clk_get(clksrc);
123#endif 111 }
124 112
125 uint32_t div = clk_calc_div(in_freq, freq); 113 uint32_t div = clk_calc_div(in_freq, freq);
126 jz_writef(CPM_SSICDR, CE(1), CLKDIV(div - 1), 114 jz_writef(CPM_SSICDR, CE(1), CLKDIV(div - 1),