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author | Aidan MacDonald <amachronic@protonmail.com> | 2021-05-30 19:56:44 +0100 |
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committer | Aidan MacDonald <amachronic@protonmail.com> | 2021-05-30 19:17:50 +0000 |
commit | f63edb52ef8ecf18520926b40b3c61db37081a9d (patch) | |
tree | 29c36d3f247d7bab2f547d76655ac81fa8a71946 /firmware/target/mips/ingenic_x1000/pcm-x1000.c | |
parent | c78ba1aa689b178ebb73b2730bc1b13697371fbf (diff) | |
download | rockbox-f63edb52ef8ecf18520926b40b3c61db37081a9d.tar.gz rockbox-f63edb52ef8ecf18520926b40b3c61db37081a9d.zip |
x1000: refactor AIC initialization
Have pcm-x1000 handle most work, so target's audiohw code touches
only the relevant settings.
Change-Id: Icf3d1b7ca428ac50a5a16ecec39ed8186ac5ae13
Diffstat (limited to 'firmware/target/mips/ingenic_x1000/pcm-x1000.c')
-rw-r--r-- | firmware/target/mips/ingenic_x1000/pcm-x1000.c | 100 |
1 files changed, 92 insertions, 8 deletions
diff --git a/firmware/target/mips/ingenic_x1000/pcm-x1000.c b/firmware/target/mips/ingenic_x1000/pcm-x1000.c index 9ae6f5a956..fd5e9d20c8 100644 --- a/firmware/target/mips/ingenic_x1000/pcm-x1000.c +++ b/firmware/target/mips/ingenic_x1000/pcm-x1000.c | |||
@@ -21,13 +21,16 @@ | |||
21 | 21 | ||
22 | #include "system.h" | 22 | #include "system.h" |
23 | #include "kernel.h" | 23 | #include "kernel.h" |
24 | #include "audio.h" | ||
24 | #include "audiohw.h" | 25 | #include "audiohw.h" |
25 | #include "pcm.h" | 26 | #include "pcm.h" |
26 | #include "pcm-internal.h" | 27 | #include "pcm-internal.h" |
27 | #include "panic.h" | 28 | #include "panic.h" |
28 | #include "dma-x1000.h" | 29 | #include "dma-x1000.h" |
29 | #include "irq-x1000.h" | 30 | #include "irq-x1000.h" |
31 | #include "gpio-x1000.h" | ||
30 | #include "x1000/aic.h" | 32 | #include "x1000/aic.h" |
33 | #include "x1000/cpm.h" | ||
31 | 34 | ||
32 | #define AIC_STATE_STOPPED 0 | 35 | #define AIC_STATE_STOPPED 0 |
33 | #define AIC_STATE_PLAYING 1 | 36 | #define AIC_STATE_PLAYING 1 |
@@ -41,21 +44,45 @@ static volatile int aic_dma_pending_event = DMA_EVENT_NONE; | |||
41 | 44 | ||
42 | static dma_desc aic_dma_desc; | 45 | static dma_desc aic_dma_desc; |
43 | 46 | ||
44 | static void pcm_dma_int_cb(int event); | 47 | static void pcm_play_dma_int_cb(int event); |
48 | #ifdef HAVE_RECORDING | ||
49 | static void pcm_rec_dma_int_cb(int event); | ||
50 | #endif | ||
45 | 51 | ||
46 | void pcm_play_dma_init(void) | 52 | void pcm_play_dma_init(void) |
47 | { | 53 | { |
54 | /* Ungate clock, assign pins. NB this overlaps with pins labeled "sa0-sa4" | ||
55 | * on Ingenic's datasheets but I'm not sure what they are. Probably safe to | ||
56 | * assume they are not useful to Rockbox... */ | ||
57 | jz_writef(CPM_CLKGR, AIC(0)); | ||
58 | gpio_config(GPIO_B, 0x1f, GPIO_DEVICE(1)); | ||
59 | |||
60 | /* Configure AIC with some sane defaults */ | ||
61 | jz_writef(AIC_CFG, RST(1)); | ||
62 | jz_writef(AIC_I2SCR, STPBK(1)); | ||
63 | jz_writef(AIC_CFG, MSB(0), LSMP(1), ICDC(0), AUSEL(1), BCKD(0), SYNCD(0)); | ||
64 | jz_writef(AIC_CCR, ENDSW(0), ASVTSU(0)); | ||
65 | jz_writef(AIC_I2SCR, RFIRST(0), ESCLK(0), AMSL(0)); | ||
66 | jz_write(AIC_SPENA, 0); | ||
67 | |||
48 | /* Let the target initialize its hardware and setup the AIC */ | 68 | /* Let the target initialize its hardware and setup the AIC */ |
49 | audiohw_init(); | 69 | audiohw_init(); |
50 | 70 | ||
51 | /* Set DMA callback */ | 71 | /* Program audio format (stereo, packed 16 bit samples) */ |
52 | dma_set_callback(DMA_CHANNEL_AUDIO, pcm_dma_int_cb); | 72 | jz_writef(AIC_CCR, PACK16(1), CHANNEL_V(STEREO), |
73 | OSS_V(16BIT), ISS_V(16BIT), M2S(0)); | ||
74 | jz_writef(AIC_I2SCR, SWLH(0)); | ||
53 | 75 | ||
54 | /* Program FIFO threshold -- DMA settings must match */ | 76 | /* Set DMA settings */ |
55 | jz_writef(AIC_CFG, TFTH(16)); | 77 | jz_writef(AIC_CFG, TFTH(16), RFTH(16)); |
78 | dma_set_callback(DMA_CHANNEL_AUDIO, pcm_play_dma_int_cb); | ||
79 | #ifdef HAVE_RECORDING | ||
80 | dma_set_callback(DMA_CHANNEL_RECORD, pcm_rec_dma_int_cb); | ||
81 | #endif | ||
56 | 82 | ||
57 | /* Ensure all playback is disabled */ | 83 | /* Mask all interrupts and disable playback/recording */ |
58 | jz_writef(AIC_CCR, ERPL(0)); | 84 | jz_writef(AIC_CCR, EROR(0), ETUR(0), ERFS(0), ETFS(0), |
85 | ENLBF(0), ERPL(0), EREC(0)); | ||
59 | 86 | ||
60 | /* Enable the controller */ | 87 | /* Enable the controller */ |
61 | jz_writef(AIC_CFG, ENABLE(1)); | 88 | jz_writef(AIC_CFG, ENABLE(1)); |
@@ -112,7 +139,7 @@ static void pcm_dma_handle_event(int event) | |||
112 | } | 139 | } |
113 | } | 140 | } |
114 | 141 | ||
115 | static void pcm_dma_int_cb(int event) | 142 | static void pcm_play_dma_int_cb(int event) |
116 | { | 143 | { |
117 | if(aic_lock) { | 144 | if(aic_lock) { |
118 | aic_dma_pending_event = event; | 145 | aic_dma_pending_event = event; |
@@ -156,6 +183,63 @@ void pcm_play_unlock(void) | |||
156 | restore_irq(irq); | 183 | restore_irq(irq); |
157 | } | 184 | } |
158 | 185 | ||
186 | #ifdef HAVE_RECORDING | ||
187 | /* | ||
188 | * Recording | ||
189 | */ | ||
190 | |||
191 | /* FIXME need to implement this!! */ | ||
192 | |||
193 | static void pcm_rec_dma_int_cb(int event) | ||
194 | { | ||
195 | (void)event; | ||
196 | } | ||
197 | |||
198 | void pcm_rec_dma_init(void) | ||
199 | { | ||
200 | } | ||
201 | |||
202 | void pcm_rec_dma_close(void) | ||
203 | { | ||
204 | } | ||
205 | |||
206 | void pcm_rec_dma_start(void* addr, size_t size) | ||
207 | { | ||
208 | (void)addr; | ||
209 | (void)size; | ||
210 | } | ||
211 | |||
212 | void pcm_rec_dma_stop(void) | ||
213 | { | ||
214 | } | ||
215 | |||
216 | void pcm_rec_lock(void) | ||
217 | { | ||
218 | |||
219 | } | ||
220 | |||
221 | void pcm_rec_unlock(void) | ||
222 | { | ||
223 | |||
224 | } | ||
225 | |||
226 | const void* pcm_rec_dma_get_peak_buffer(void) | ||
227 | { | ||
228 | return NULL; | ||
229 | } | ||
230 | |||
231 | void audio_set_output_source(int source) | ||
232 | { | ||
233 | (void)source; | ||
234 | } | ||
235 | |||
236 | void audio_input_mux(int source, unsigned flags) | ||
237 | { | ||
238 | (void)source; | ||
239 | (void)flags; | ||
240 | } | ||
241 | #endif /* HAVE_RECORDING */ | ||
242 | |||
159 | void AIC(void) | 243 | void AIC(void) |
160 | { | 244 | { |
161 | if(jz_readf(AIC_SR, TUR)) { | 245 | if(jz_readf(AIC_SR, TUR)) { |