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| author | Aidan MacDonald <amachronic@protonmail.com> | 2022-05-30 14:08:02 +0100 |
|---|---|---|
| committer | Aidan MacDonald <amachronic@protonmail.com> | 2022-05-30 14:08:02 +0100 |
| commit | 4d01168b9bcdb8c060604cbd851e4ea13b4aa9b5 (patch) | |
| tree | bee76112f4066f60e80fa5d0511a27cef3224a6c /firmware/target/mips/ingenic_x1000/nand-x1000.h | |
| parent | e05aa27124461ccf85109ae8d249924895f07a3e (diff) | |
| download | rockbox-4d01168b9bcdb8c060604cbd851e4ea13b4aa9b5.tar.gz rockbox-4d01168b9bcdb8c060604cbd851e4ea13b4aa9b5.zip | |
x1000: add flash probe tool to bootloader
The flash probe mimics the boot ROM's flash read routines and
dumps the manufacturer & device IDs and 16-byte parameter data
to a file on the SD card.
Change-Id: I3d413bd0cc05a9d7f2285b85454420c3e90274e9
Diffstat (limited to 'firmware/target/mips/ingenic_x1000/nand-x1000.h')
| -rw-r--r-- | firmware/target/mips/ingenic_x1000/nand-x1000.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/firmware/target/mips/ingenic_x1000/nand-x1000.h b/firmware/target/mips/ingenic_x1000/nand-x1000.h index 150361b739..5e6d1f09bc 100644 --- a/firmware/target/mips/ingenic_x1000/nand-x1000.h +++ b/firmware/target/mips/ingenic_x1000/nand-x1000.h | |||
| @@ -49,6 +49,7 @@ | |||
| 49 | #define NANDCMD_GET_FEATURE SFC_CMD(0x0f, SFC_TMODE_1_1_1, 1, 0, SFC_PFMT_ADDR_FIRST, 1) | 49 | #define NANDCMD_GET_FEATURE SFC_CMD(0x0f, SFC_TMODE_1_1_1, 1, 0, SFC_PFMT_ADDR_FIRST, 1) |
| 50 | #define NANDCMD_SET_FEATURE SFC_CMD(0x1f, SFC_TMODE_1_1_1, 1, 0, SFC_PFMT_ADDR_FIRST, 1) | 50 | #define NANDCMD_SET_FEATURE SFC_CMD(0x1f, SFC_TMODE_1_1_1, 1, 0, SFC_PFMT_ADDR_FIRST, 1) |
| 51 | #define NANDCMD_PAGE_READ(x) SFC_CMD(0x13, SFC_TMODE_1_1_1, x, 0, SFC_PFMT_ADDR_FIRST, 0) | 51 | #define NANDCMD_PAGE_READ(x) SFC_CMD(0x13, SFC_TMODE_1_1_1, x, 0, SFC_PFMT_ADDR_FIRST, 0) |
| 52 | #define NANDCMD_READ_CACHE_SLOW(x) SFC_CMD(0x03, SFC_TMODE_1_1_1, x, 8, SFC_PFMT_ADDR_FIRST, 1) | ||
| 52 | #define NANDCMD_READ_CACHE(x) SFC_CMD(0x0b, SFC_TMODE_1_1_1, x, 8, SFC_PFMT_ADDR_FIRST, 1) | 53 | #define NANDCMD_READ_CACHE(x) SFC_CMD(0x0b, SFC_TMODE_1_1_1, x, 8, SFC_PFMT_ADDR_FIRST, 1) |
| 53 | #define NANDCMD_READ_CACHE_x4(x) SFC_CMD(0x6b, SFC_TMODE_1_1_4, x, 8, SFC_PFMT_ADDR_FIRST, 1) | 54 | #define NANDCMD_READ_CACHE_x4(x) SFC_CMD(0x6b, SFC_TMODE_1_1_4, x, 8, SFC_PFMT_ADDR_FIRST, 1) |
| 54 | #define NANDCMD_PROGRAM_LOAD(x) SFC_CMD(0x02, SFC_TMODE_1_1_1, x, 0, SFC_PFMT_ADDR_FIRST, 1) | 55 | #define NANDCMD_PROGRAM_LOAD(x) SFC_CMD(0x02, SFC_TMODE_1_1_1, x, 0, SFC_PFMT_ADDR_FIRST, 1) |