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author | Maurus Cuelenaere <mcuelenaere@gmail.com> | 2009-04-18 21:00:32 +0000 |
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committer | Maurus Cuelenaere <mcuelenaere@gmail.com> | 2009-04-18 21:00:32 +0000 |
commit | 069191d9d4535b4eb4d7cafff43d7e6e23ac2014 (patch) | |
tree | c2211c348e51d1177bac0f518fef5169ac3002a7 /firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c | |
parent | 3314f389baf54e74e3c52c069f8e829a701b2b94 (diff) | |
download | rockbox-069191d9d4535b4eb4d7cafff43d7e6e23ac2014.tar.gz rockbox-069191d9d4535b4eb4d7cafff43d7e6e23ac2014.zip |
Fix some issues with YUV blitting on Onda VX747 (still not working properly)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20736 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c')
-rw-r--r-- | firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c | 34 |
1 files changed, 22 insertions, 12 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c b/firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c index 25265395b2..44d80e1c58 100644 --- a/firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c +++ b/firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c | |||
@@ -150,12 +150,23 @@ void lcd_blit_yuv(unsigned char * const src[3], | |||
150 | int src_x, int src_y, int stride, | 150 | int src_x, int src_y, int stride, |
151 | int x, int y, int width, int height) | 151 | int x, int y, int width, int height) |
152 | { | 152 | { |
153 | unsigned char const * yuv_src[3]; | ||
154 | register off_t z; | ||
155 | |||
156 | if(!lcd_is_on) | ||
157 | return; | ||
158 | |||
159 | z = stride * src_y; | ||
160 | yuv_src[0] = src[0] + z + src_x; | ||
161 | yuv_src[1] = src[1] + (z >> 2) + (src_x >> 1); | ||
162 | yuv_src[2] = src[2] + (yuv_src[1] - src[1]); | ||
163 | |||
153 | __dcache_writeback_all(); | 164 | __dcache_writeback_all(); |
154 | 165 | ||
155 | __cpm_start_ipu(); | 166 | __cpm_start_ipu(); |
156 | 167 | ||
157 | IPU_STOP_IPU(); | 168 | IPU_STOP_IPU(); |
158 | IPU_RESET_IPU() | 169 | IPU_RESET_IPU(); |
159 | IPU_CLEAR_END_FLAG(); | 170 | IPU_CLEAR_END_FLAG(); |
160 | 171 | ||
161 | IPU_DISABLE_RSIZE(); | 172 | IPU_DISABLE_RSIZE(); |
@@ -168,18 +179,18 @@ void lcd_blit_yuv(unsigned char * const src[3], | |||
168 | IPU_SET_Y_STRIDE(stride); | 179 | IPU_SET_Y_STRIDE(stride); |
169 | IPU_SET_UV_STRIDE(stride, stride); | 180 | IPU_SET_UV_STRIDE(stride, stride); |
170 | 181 | ||
171 | IPU_SET_Y_ADDR((unsigned long)src[0]); | 182 | IPU_SET_Y_ADDR(PHYSADDR((unsigned long)yuv_src[0])); |
172 | IPU_SET_U_ADDR((unsigned long)src[2]); | 183 | IPU_SET_U_ADDR(PHYSADDR((unsigned long)yuv_src[1])); |
173 | IPU_SET_V_ADDR((unsigned long)src[3]); | 184 | IPU_SET_V_ADDR(PHYSADDR((unsigned long)yuv_src[2])); |
174 | IPU_SET_OUT_ADDR(PHYSADDR((unsigned long)&lcd_framebuffer[y][x])); | 185 | IPU_SET_OUT_ADDR(PHYSADDR((unsigned long)&lcd_framebuffer[x][y])); |
175 | 186 | ||
176 | IPU_SET_OUT_FM(width, height); | 187 | IPU_SET_OUT_FM(height, width); |
177 | IPU_SET_OUT_STRIDE(stride); | 188 | IPU_SET_OUT_STRIDE(height); |
178 | 189 | ||
179 | IPU_SET_CSC_C0_COEF(YUV_CSC_C0); | 190 | IPU_SET_CSC_C0_COEF(YUV_CSC_C0); |
180 | IPU_SET_CSC_C1_COEF(YUV_CSC_C1); | 191 | IPU_SET_CSC_C1_COEF(YUV_CSC_C1); |
181 | IPU_SET_CSC_C2_COEF(YUV_CSC_C2); | 192 | IPU_SET_CSC_C2_COEF(YUV_CSC_C2); |
182 | IPU_SET_CSC_C2_COEF(YUV_CSC_C3); | 193 | IPU_SET_CSC_C3_COEF(YUV_CSC_C3); |
183 | IPU_SET_CSC_C4_COEF(YUV_CSC_C4); | 194 | IPU_SET_CSC_C4_COEF(YUV_CSC_C4); |
184 | 195 | ||
185 | IPU_RUN_IPU(); | 196 | IPU_RUN_IPU(); |
@@ -188,11 +199,10 @@ void lcd_blit_yuv(unsigned char * const src[3], | |||
188 | 199 | ||
189 | IPU_CLEAR_END_FLAG(); | 200 | IPU_CLEAR_END_FLAG(); |
190 | IPU_STOP_IPU(); | 201 | IPU_STOP_IPU(); |
202 | IPU_RESET_IPU(); | ||
191 | 203 | ||
192 | //__cpm_stop_ipu(); | 204 | __cpm_stop_ipu(); |
193 | |||
194 | __dcache_invalidate_all(); | ||
195 | 205 | ||
196 | /* YUV speed is limited by LCD speed */ | 206 | /* YUV speed is limited by LCD speed */ |
197 | lcd_update_rect(x, y, width, height); | 207 | lcd_update_rect(y, x, height, width); |
198 | } | 208 | } |