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authorMaurus Cuelenaere <mcuelenaere@gmail.com>2009-06-01 21:21:29 +0000
committerMaurus Cuelenaere <mcuelenaere@gmail.com>2009-06-01 21:21:29 +0000
commitaa7d43f7a61998080be228f94aa3d26b5c1dfbc5 (patch)
tree56a22122d8924a52a57450569c46294fdeee15f6 /firmware/target/mips/ingenic_jz47xx/codec-jz4740.c
parentc1c3d05961388114779c6fd8316ab1d081a3b4b1 (diff)
downloadrockbox-aa7d43f7a61998080be228f94aa3d26b5c1dfbc5.tar.gz
rockbox-aa7d43f7a61998080be228f94aa3d26b5c1dfbc5.zip
Fix reds & yellow
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21162 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/mips/ingenic_jz47xx/codec-jz4740.c')
-rw-r--r--firmware/target/mips/ingenic_jz47xx/codec-jz4740.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c b/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c
index 325a3734d8..b91b7fae70 100644
--- a/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c
@@ -362,6 +362,7 @@ void audio_input_mux(int source, unsigned flags)
362 } 362 }
363 break; 363 break;
364 364
365#if INPUT_SRC_CAPS & SRC_CAP_MIC
365 case AUDIO_SRC_MIC: /* recording only */ 366 case AUDIO_SRC_MIC: /* recording only */
366 audio_channels = 1; 367 audio_channels = 1;
367 if(source != last_source) 368 if(source != last_source)
@@ -370,7 +371,9 @@ void audio_input_mux(int source, unsigned flags)
370 | (ICDC_CDCCR1_EADC | ICDC_CDCCR1_SW1ON | ICDC_CDCCR1_EMIC); 371 | (ICDC_CDCCR1_EADC | ICDC_CDCCR1_SW1ON | ICDC_CDCCR1_EMIC);
371 } 372 }
372 break; 373 break;
374#endif
373 375
376#if INPUT_SRC_CAPS & SRC_CAP_FMRADIO
374 case AUDIO_SRC_FMRADIO: /* recording and playback */ 377 case AUDIO_SRC_FMRADIO: /* recording and playback */
375 audio_channels = 2; 378 audio_channels = 2;
376 379
@@ -390,6 +393,7 @@ void audio_input_mux(int source, unsigned flags)
390 ICDC_CDCCR1_SW2ON | ICDC_CDCCR1_HPMUTE)) | (ICDC_CDCCR1_SW1ON | ICDC_CDCCR1_ELININ); 393 ICDC_CDCCR1_SW2ON | ICDC_CDCCR1_HPMUTE)) | (ICDC_CDCCR1_SW1ON | ICDC_CDCCR1_ELININ);
391 } 394 }
392 break; 395 break;
396#endif
393 } /* end switch */ 397 } /* end switch */
394 398
395 last_source = source; 399 last_source = source;