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author | Maurus Cuelenaere <mcuelenaere@gmail.com> | 2008-12-04 18:26:19 +0000 |
---|---|---|
committer | Maurus Cuelenaere <mcuelenaere@gmail.com> | 2008-12-04 18:26:19 +0000 |
commit | a119c44c7ec7a383dafbb391f052aaade0b6c981 (patch) | |
tree | 166f1ebc5dad5c132adeca9376ad323023f55a28 /firmware/target/mips/ingenic_jz47xx/codec-jz4740.c | |
parent | b2dd3c210e909baec303a94463dc5517acc2780a (diff) | |
download | rockbox-a119c44c7ec7a383dafbb391f052aaade0b6c981.tar.gz rockbox-a119c44c7ec7a383dafbb391f052aaade0b6c981.zip |
Ingenic targets:
* Clean up codec & PCM + functional changes
* LCD: Don't wait on DMAC in lcd_unlock()
* SADC: add battery mutex + other changes
* NAND: add mutex
* USB rework (still not working)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19327 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/mips/ingenic_jz47xx/codec-jz4740.c')
-rw-r--r-- | firmware/target/mips/ingenic_jz47xx/codec-jz4740.c | 60 |
1 files changed, 45 insertions, 15 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c b/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c index 6c3ed8cf2a..dec343a0da 100644 --- a/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c +++ b/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c | |||
@@ -21,6 +21,7 @@ | |||
21 | 21 | ||
22 | #include "config.h" | 22 | #include "config.h" |
23 | #include "jz4740.h" | 23 | #include "jz4740.h" |
24 | #include "system.h" | ||
24 | 25 | ||
25 | static unsigned short codec_volume; | 26 | static unsigned short codec_volume; |
26 | static unsigned short codec_base_gain; | 27 | static unsigned short codec_base_gain; |
@@ -29,6 +30,8 @@ static bool HP_on_off_flag; | |||
29 | static int HP_register_value; | 30 | static int HP_register_value; |
30 | static int IS_WRITE_PCM; | 31 | static int IS_WRITE_PCM; |
31 | 32 | ||
33 | static void i2s_codec_set_samplerate(unsigned short rate); | ||
34 | |||
32 | static void i2s_codec_clear(void) | 35 | static void i2s_codec_clear(void) |
33 | { | 36 | { |
34 | REG_ICDC_CDCCR1 = (ICDC_CDCCR1_SW2ON | ICDC_CDCCR1_PDVR | ICDC_CDCCR1_PDVRA | ICDC_CDCCR1_VRCGL | | 37 | REG_ICDC_CDCCR1 = (ICDC_CDCCR1_SW2ON | ICDC_CDCCR1_PDVR | ICDC_CDCCR1_PDVRA | ICDC_CDCCR1_VRCGL | |
@@ -38,11 +41,11 @@ static void i2s_codec_clear(void) | |||
38 | 41 | ||
39 | static void i2s_codec_init(void) | 42 | static void i2s_codec_init(void) |
40 | { | 43 | { |
44 | __aic_enable(); | ||
45 | |||
41 | __aic_select_i2s(); | 46 | __aic_select_i2s(); |
42 | __i2s_internal_codec(); | 47 | __i2s_internal_codec(); |
43 | 48 | ||
44 | __aic_enable(); | ||
45 | |||
46 | __i2s_set_oss_sample_size(16); | 49 | __i2s_set_oss_sample_size(16); |
47 | 50 | ||
48 | REG_ICDC_CDCCR1 = (ICDC_CDCCR1_SW2ON | ICDC_CDCCR1_PDVR | ICDC_CDCCR1_PDVRA | ICDC_CDCCR1_VRCGL | | 51 | REG_ICDC_CDCCR1 = (ICDC_CDCCR1_SW2ON | ICDC_CDCCR1_PDVR | ICDC_CDCCR1_PDVRA | ICDC_CDCCR1_VRCGL | |
@@ -55,14 +58,32 @@ static void i2s_codec_init(void) | |||
55 | //REG_ICDC_CDCCR2 = (ICDC_CDCCR2_AINVOL(ICDC_CDCCR2_AINVOL_DB(0)) | ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_48) | | 58 | //REG_ICDC_CDCCR2 = (ICDC_CDCCR2_AINVOL(ICDC_CDCCR2_AINVOL_DB(0)) | ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_48) | |
56 | REG_ICDC_CDCCR2 = (ICDC_CDCCR2_AINVOL(23) | ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_48) | | 59 | REG_ICDC_CDCCR2 = (ICDC_CDCCR2_AINVOL(23) | ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_48) | |
57 | ICDC_CDCCR2_HPVOL(ICDC_CDCCR2_HPVOL_6)); | 60 | ICDC_CDCCR2_HPVOL(ICDC_CDCCR2_HPVOL_6)); |
61 | |||
62 | REG_ICDC_CDCCR1 &= 0xfffffffc; | ||
63 | |||
64 | mdelay(15); | ||
65 | REG_ICDC_CDCCR1 &= 0xffecffff; | ||
66 | REG_ICDC_CDCCR1 |= (ICDC_CDCCR1_EDAC | ICDC_CDCCR1_HPCG); | ||
67 | |||
68 | mdelay(600); | ||
69 | REG_ICDC_CDCCR1 &= 0xfff7ecff; | ||
70 | |||
71 | mdelay(2); | ||
72 | |||
73 | /* CDCCR1.ELININ=0, CDCCR1.EMIC=0, CDCCR1.EADC=0, CDCCR1.SW1ON=0, CDCCR1.EDAC=1, CDCCR1.SW2ON=1, CDCCR1.HPMUTE=0 */ | ||
74 | REG_ICDC_CDCCR1 = (REG_ICDC_CDCCR1 & ~((1 << 29) | (1 << 28) | (1 << 26) | (1 << 27) | (1 << 14))) | ((1 << 24) | (1 << 25)); | ||
75 | |||
76 | REG_ICDC_CDCCR2 = ((REG_ICDC_CDCCR2 & ~(0x3)) | 3); | ||
77 | |||
78 | i2s_codec_set_samplerate(44100); | ||
79 | |||
58 | HP_on_off_flag = 0; /* HP is off */ | 80 | HP_on_off_flag = 0; /* HP is off */ |
59 | } | 81 | } |
60 | 82 | ||
61 | static void i2s_codec_set_mic(unsigned short v) /* 0 <= v <= 100 */ | 83 | static void i2s_codec_set_mic(unsigned short v) /* 0 <= v <= 100 */ |
62 | { | 84 | { |
63 | v = v & 0xff; | 85 | v &= 0xff; |
64 | if(v < 0) | 86 | |
65 | v = 0; | ||
66 | if(v > 100) | 87 | if(v > 100) |
67 | v = 100; | 88 | v = 100; |
68 | codec_mic_gain = 31 * v/100; | 89 | codec_mic_gain = 31 * v/100; |
@@ -72,9 +93,8 @@ static void i2s_codec_set_mic(unsigned short v) /* 0 <= v <= 100 */ | |||
72 | 93 | ||
73 | static void i2s_codec_set_bass(unsigned short v) /* 0 <= v <= 100 */ | 94 | static void i2s_codec_set_bass(unsigned short v) /* 0 <= v <= 100 */ |
74 | { | 95 | { |
75 | v = v & 0xff; | 96 | v &= 0xff; |
76 | if(v < 0) | 97 | |
77 | v = 0; | ||
78 | if(v > 100) | 98 | if(v > 100) |
79 | v = 100; | 99 | v = 100; |
80 | 100 | ||
@@ -92,9 +112,8 @@ static void i2s_codec_set_bass(unsigned short v) /* 0 <= v <= 100 */ | |||
92 | 112 | ||
93 | static void i2s_codec_set_volume(unsigned short v) /* 0 <= v <= 100 */ | 113 | static void i2s_codec_set_volume(unsigned short v) /* 0 <= v <= 100 */ |
94 | { | 114 | { |
95 | v = v & 0xff; | 115 | v &= 0xff; |
96 | if(v < 0) | 116 | |
97 | v = 0; | ||
98 | if(v > 100) | 117 | if(v > 100) |
99 | v = 100; | 118 | v = 100; |
100 | 119 | ||
@@ -114,6 +133,7 @@ static unsigned short i2s_codec_get_bass(void) | |||
114 | { | 133 | { |
115 | unsigned short val; | 134 | unsigned short val; |
116 | int ret; | 135 | int ret; |
136 | |||
117 | if(codec_base_gain == 0) | 137 | if(codec_base_gain == 0) |
118 | val = 0; | 138 | val = 0; |
119 | if(codec_base_gain == 1) | 139 | if(codec_base_gain == 1) |
@@ -124,7 +144,9 @@ static unsigned short i2s_codec_get_bass(void) | |||
124 | val = 75; | 144 | val = 75; |
125 | 145 | ||
126 | ret = val << 8; | 146 | ret = val << 8; |
127 | val = val | ret; | 147 | val |= ret; |
148 | |||
149 | return val; | ||
128 | } | 150 | } |
129 | 151 | ||
130 | static unsigned short i2s_codec_get_mic(void) | 152 | static unsigned short i2s_codec_get_mic(void) |
@@ -133,7 +155,9 @@ static unsigned short i2s_codec_get_mic(void) | |||
133 | int ret; | 155 | int ret; |
134 | val = 100 * codec_mic_gain / 31; | 156 | val = 100 * codec_mic_gain / 31; |
135 | ret = val << 8; | 157 | ret = val << 8; |
136 | val = val | ret; | 158 | val |= ret; |
159 | |||
160 | return val; | ||
137 | } | 161 | } |
138 | 162 | ||
139 | static unsigned short i2s_codec_get_volume(void) | 163 | static unsigned short i2s_codec_get_volume(void) |
@@ -151,7 +175,8 @@ static unsigned short i2s_codec_get_volume(void) | |||
151 | val = 75; | 175 | val = 75; |
152 | 176 | ||
153 | ret = val << 8; | 177 | ret = val << 8; |
154 | val = val | ret; | 178 | val |= ret; |
179 | |||
155 | return val; | 180 | return val; |
156 | } | 181 | } |
157 | 182 | ||
@@ -271,10 +296,15 @@ void audiohw_mute(bool mute) | |||
271 | 296 | ||
272 | void audiohw_preinit(void) | 297 | void audiohw_preinit(void) |
273 | { | 298 | { |
274 | i2s_reset(); | 299 | i2s_codec_init(); |
275 | } | 300 | } |
276 | 301 | ||
277 | void audiohw_postinit(void) | 302 | void audiohw_postinit(void) |
278 | { | 303 | { |
279 | audiohw_mute(false); | 304 | audiohw_mute(false); |
280 | } | 305 | } |
306 | |||
307 | void audiohw_init(void) | ||
308 | { | ||
309 | |||
310 | } | ||