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authorWilliam Wilgus <wilgus.william@gmail.com>2020-10-23 11:29:38 -0400
committerWilliam Wilgus <me.theuser@yahoo.com>2020-10-23 15:35:11 +0000
commit3a7a46d1c02ecc633d65035b9c536858c1fccc3a (patch)
treeb7fd06ebeeb53a74c82ad584e4380fcd61bce559 /firmware/target/hosted
parent186dbb45275e051a8a93d2cf66c416bf75c0174e (diff)
downloadrockbox-3a7a46d1c02ecc633d65035b9c536858c1fccc3a.tar.gz
rockbox-3a7a46d1c02ecc633d65035b9c536858c1fccc3a.zip
Hosted targets Fix timer cycle calculation overflow
at 1 GHZ the intermediate calculation for cycles overflows 32 bits this makes timer fail even with sensible values solution divide both sides by 100 Change-Id: I18a4054c2d06fb72531d5496bba562f71b03984f
Diffstat (limited to 'firmware/target/hosted')
-rw-r--r--firmware/target/hosted/kernel-unix.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/firmware/target/hosted/kernel-unix.c b/firmware/target/hosted/kernel-unix.c
index 1ce4dd8a10..5e9204effd 100644
--- a/firmware/target/hosted/kernel-unix.c
+++ b/firmware/target/hosted/kernel-unix.c
@@ -104,7 +104,7 @@ void tick_start(unsigned int interval_in_ms)
104} 104}
105 105
106#define cycles_to_microseconds(cycles) \ 106#define cycles_to_microseconds(cycles) \
107 ((int)((1000000*cycles)/TIMER_FREQ)) 107 ((int)((10000*cycles)/(TIMER_FREQ / 100)))
108 108
109 109
110static timer_t timer_tid; 110static timer_t timer_tid;