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authorMichael Sevakis <jethead71@rockbox.org>2007-04-13 20:55:48 +0000
committerMichael Sevakis <jethead71@rockbox.org>2007-04-13 20:55:48 +0000
commitd95c39072ace1a7aeaad3ee49ed668399b4862bd (patch)
tree7f8c8e41e5e793daa64051f153bbbd52ccbe8fc9 /firmware/target/coldfire
parente10f455fbd3149a034e35d30be333f958d773d92 (diff)
downloadrockbox-d95c39072ace1a7aeaad3ee49ed668399b4862bd.tar.gz
rockbox-d95c39072ace1a7aeaad3ee49ed668399b4862bd.zip
Portal Player: Add invalidate_icache and flush_icache. Flush the cache on the core for newborn threads. In doing so, move more ARM stuff to the target tree and organize it to make a clean job of it. If anything isn't appropriate for some particular device give a hollar or even just fix it by some added #ifdefing. I was informed that the PP targets are register compatible so I'm going off that advice. The Sansa likes it though.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13144 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/coldfire')
-rw-r--r--firmware/target/coldfire/system-target.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/firmware/target/coldfire/system-target.h b/firmware/target/coldfire/system-target.h
index 40542353be..6f1b2eb4ae 100644
--- a/firmware/target/coldfire/system-target.h
+++ b/firmware/target/coldfire/system-target.h
@@ -19,6 +19,9 @@
19#ifndef SYSTEM_TARGET_H 19#ifndef SYSTEM_TARGET_H
20#define SYSTEM_TARGET_H 20#define SYSTEM_TARGET_H
21 21
22#define nop \
23 asm volatile ("trapf")
24
22#define or_l(mask, address) \ 25#define or_l(mask, address) \
23 asm \ 26 asm \
24 ("or.l %0,(%1)" \ 27 ("or.l %0,(%1)" \
@@ -147,6 +150,7 @@ static inline uint32_t swap_odd_even32(uint32_t value)
147 return value; 150 return value;
148} 151}
149 152
153#define HAVE_INVALIDATE_ICACHE
150static inline void invalidate_icache(void) 154static inline void invalidate_icache(void)
151{ 155{
152 asm volatile ("move.l #0x01000000,%d0\n" 156 asm volatile ("move.l #0x01000000,%d0\n"