Coldfire: Fix the modification of IMR. Interrupts must be masked at the core level at at least the level of the interrupt being masked. Not following the datasheet and relying strictly on and/or_l causes unhandled 'Levelx' exceptions (showing itself quite often in PCM mixer work which more greatly stresses PCM lockout).

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30009 a1c6a512-1295-4272-9138-f99709370657

1 files changed, 1 insertions, 1 deletions

diff --git a/firmware/target/coldfire/mpio/hd200/lcd-hd200.c b/firmware/target/coldfire/mpio/hd200/lcd-hd200.c
index 682ed6a311..879352f7b4 100644
--- a/firmware/target/coldfire/mpio/hd200/lcd-hd200.c
+++ b/firmware/target/coldfire/mpio/hd200/lcd-hd200.c
@@ -167,7 +167,7 @@ void lcd_init_device(void)
     DSR3 = 1;
     DIVR3 = 57;        /* DMA3 is mapped into vector 57 in system.c */
     ICR9 = (6 << 2);   /* Enable DMA3 interrupt at level 6, priority 0 */
-    and_l(~(1<<17), &IMR);
+    coldfire_imr_mod(0, 1 << 17);
 
     mutex_init(&lcd_mtx);