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authorJens Arnold <amiconn@rockbox.org>2008-01-09 23:48:26 +0000
committerJens Arnold <amiconn@rockbox.org>2008-01-09 23:48:26 +0000
commit6a56c14e17f6ba113ec0d4d40e75bffd61b293cc (patch)
tree64bcdd8d5d4afa2ca6dd1aa0976cdafa9a346b26 /firmware/target/coldfire/iaudio/m5/lcd-as-m5.S
parent75380fd27d175bab1818ef35a9100e74fc6a461b (diff)
downloadrockbox-6a56c14e17f6ba113ec0d4d40e75bffd61b293cc.tar.gz
rockbox-6a56c14e17f6ba113ec0d4d40e75bffd61b293cc.zip
Greyscale library: Changed the internal data format once more (separated pixel values and phases), allowing for further optimisation of drawing, scrolling etc. * Optimised grey phase blitting in the core reduces CPU load on all architectures, most significantly on coldfire. Previous version was too slow to keep up at 45MHz, leading to unwanted graininess (update frequency was halved). Also fixed screendump on 2bpp targets with vertical pixel packing.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16043 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/coldfire/iaudio/m5/lcd-as-m5.S')
-rw-r--r--firmware/target/coldfire/iaudio/m5/lcd-as-m5.S189
1 files changed, 139 insertions, 50 deletions
diff --git a/firmware/target/coldfire/iaudio/m5/lcd-as-m5.S b/firmware/target/coldfire/iaudio/m5/lcd-as-m5.S
index 7e89815ec8..0ec98e4589 100644
--- a/firmware/target/coldfire/iaudio/m5/lcd-as-m5.S
+++ b/firmware/target/coldfire/iaudio/m5/lcd-as-m5.S
@@ -88,57 +88,146 @@ lcd_write_data:
88 .type lcd_grey_data,@function 88 .type lcd_grey_data,@function
89 89
90lcd_grey_data: 90lcd_grey_data:
91 lea.l (-4*4, %sp), %sp 91 lea.l (-9*4, %sp), %sp
92 movem.l %d2-%d5, (%sp) 92 movem.l %d2-%d5/%a2-%a6, (%sp) /* free some registers */
93 movem.l (4*4+4, %sp), %a0-%a1 /* Data pointer */ 93 movem.l (9*4+4, %sp), %a0-%a2 /* values, phases, length */
94 move.l %a1, %d0 /* Length */ 94 lea.l (%a1, %a2.l*4), %a2 /* end address */
95 lea 0xf0008002, %a1 /* LCD data port */ 95 lea 0xf0008002, %a3 /* LCD data port */
96 move.l #0xff00ff00, %d2 /* mask for splitting value/phase pairs */ 96
97 97 moveq.l #15, %d3
98.greyloop: 98 add.l %a1, %d3
99 movem.l (%a0), %d4-%d5 /* fetch 4 pixel phase/value pairs at once */ 99 and.l #0xfffffff0, %d3 /* first line bound */
100 /* %d4 = p0v0p1v1, %d5 = p2v2p3v3 */ 100 move.l %a2, %d1
101 move.l %d2, %d3 /* copy mask */ 101 and.l #0xfffffff0, %d1 /* last line bound */
102 and.l %d4, %d3 /* %d3 = p0--p1-- */ 102 cmp.l %d3, %d1
103 eor.l %d3, %d4 /* %d4 = --v0--v1 */ 103 bls.w .g_tloop /* no lines to copy - jump to tail loop */
104 lsr.l #8, %d3 /* %d3 = --p0--p1 */ 104 cmp.l %a1, %d0
105 105 bls.s .g_lloop /* no head blocks - jump to line loop */
106 bclr.l #23, %d3 /* Z = !(p0 & 0x80); p0 &= ~0x80; */ 106
107 seq.b %d1 /* %d1 = ........................00000000 */ 107.g_hloop:
108 lsl.l #2, %d1 /* %d1 = ......................00000000.. */ 108 move.l (%a1), %d2 /* fetch 4 pixel phases */
109 bclr.l #7, %d3 /* Z = !(p1 & 0x80); p1 &= ~0x80; */ 109
110 seq.b %d1 /* %d1 = ......................0011111111 */ 110 bclr.l #31, %d2 /* Z = !(p0 & 0x80); p0 &= ~0x80; */
111 lsl.l #2, %d1 /* %d1 = ....................0011111111.. */ 111 seq.b %d0 /* %d0 = ........................00000000 */
112 lsl.l #2, %d0 /* %d0 = ......................00000000.. */
113 bclr.l #23, %d2 /* Z = !(p1 & 0x80); p1 &= ~0x80; */
114 seq.b %d0 /* %d0 = ......................0011111111 */
115 lsl.l #2, %d0 /* %d0 = ....................0011111111.. */
116 bclr.l #15, %d2 /* Z = !(p2 & 0x80); p2 &= ~0x80; */
117 seq.b %d0 /* %d0 = ....................001122222222 */
118 lsl.l #2, %d0 /* %d0 = ..................001122222222.. */
119 bclr.l #7, %d2 /* Z = !(p3 & 0x80); p3 &= ~0x80; */
120 seq.b %d0 /* %d0 = ..................00112233333333 */
121 lsr.l #6, %d0 /* %d0 = ........................00112233 */
122 move.w %d0, (%a3) /* write pixel block */
123
124 add.l (%a0)+, %d2 /* add 4 pixel values to the phases */
125 move.l %d2, (%a1)+ /* store new phases, advance pointer */
126
127 cmp.l %a1, %d3 /* go up to first line bound */
128 bhi.s .g_hloop
129
130.g_lloop:
131 movem.l (%a1), %d2-%d5
132
133 bclr.l #31, %d2
134 seq.b %d0
135 lsl.l #2, %d0
136 bclr.l #23, %d2
137 seq.b %d0
138 lsl.l #2, %d0
139 bclr.l #15, %d2
140 seq.b %d0
141 lsl.l #2, %d0
142 bclr.l #7, %d2
143 seq.b %d0
144 lsr.l #6, %d0
145 move.w %d0, (%a3)
146
147 bclr.l #31, %d3
148 seq.b %d0
149 lsl.l #2, %d0
150 bclr.l #23, %d3
151 seq.b %d0
152 lsl.l #2, %d0
153 bclr.l #15, %d3
154 seq.b %d0
155 lsl.l #2, %d0
156 bclr.l #7, %d3
157 seq.b %d0
158 lsr.l #6, %d0
159 move.w %d0, (%a3)
112 160
113 add.l %d4, %d3 /* p0 += v0; p1 += v1; */ 161 bclr.l #31, %d4
114 move.b %d3, (2, %a0) /* store p1 */ 162 seq.b %d0
115 swap %d3 163 lsl.l #2, %d0
116 move.b %d3, (%a0) /* store p0 */ 164 bclr.l #23, %d4
117 165 seq.b %d0
118 move.l %d2, %d3 /* copy mask */ 166 lsl.l #2, %d0
119 and.l %d5, %d3 /* %d3 = p2--p3-- */ 167 bclr.l #15, %d4
120 eor.l %d3, %d5 /* %d5 = --v2--v3 */ 168 seq.b %d0
121 lsr.l #8, %d3 /* %d3 = --p2--p3 */ 169 lsl.l #2, %d0
122 170 bclr.l #7, %d4
123 bclr.l #23, %d3 /* Z = !(p2 & 0x80); p2 &= ~0x80; */ 171 seq.b %d0
124 seq.b %d1 /* %d1 = ....................001122222222 */ 172 lsr.l #6, %d0
125 lsl.l #2, %d1 /* %d1 = ..................001122222222.. */ 173 move.w %d0, (%a3)
126 bclr.l #7, %d3 /* Z = !(p3 & 0x80); p3 &= ~0x80; */ 174
127 seq.b %d1 /* %d1 = ..................00112233333333 */ 175 bclr.l #31, %d5
128 lsr.l #6, %d1 /* %d1 = ........................00112233 */ 176 seq.b %d0
129 177 lsl.l #2, %d0
130 add.l %d5, %d3 /* p2 += v2; p3 += v3; */ 178 bclr.l #23, %d5
131 move.b %d3, (6, %a0) /* store p3 */ 179 seq.b %d0
132 swap %d3 180 lsl.l #2, %d0
133 move.b %d3, (4, %a0) /* store p2 */ 181 bclr.l #15, %d5
134 182 seq.b %d0
135 move.w %d1, (%a1) /* write pixel block */ 183 lsl.l #2, %d0
136 addq.l #8, %a0 /* advance address pointer */ 184 bclr.l #7, %d5
137 subq.l #1, %d0 /* any blocks left? */ 185 seq.b %d0
138 bne.b .greyloop 186 lsr.l #6, %d0
139 187 move.w %d0, (%a3)
140 movem.l (%sp), %d2-%d5 188
141 lea.l (4*4, %sp), %sp 189 movem.l (%a0), %d0/%a4-%a6
190 lea.l (16, %a0), %a0
191 add.l %d0, %d2
192 add.l %a4, %d3
193 add.l %a5, %d4
194 add.l %a6, %d5
195 movem.l %d2-%d5, (%a1)
196 lea.l (16, %a1), %a1
197
198 cmp.l %a1, %d1 /* go up to last line bound */
199 bhi.w .g_lloop
200
201 cmp.l %a1, %a2
202 bls.s .g_no_tail
203
204.g_tloop:
205 move.l (%a1), %d2
206
207 bclr.l #31, %d2
208 seq.b %d0
209 lsl.l #2, %d0
210 bclr.l #23, %d2
211 seq.b %d0
212 lsl.l #2, %d0
213 bclr.l #15, %d2
214 seq.b %d0
215 lsl.l #2, %d0
216 bclr.l #7, %d2
217 seq.b %d0
218 lsr.l #6, %d0
219 move.w %d0, (%a3)
220
221 add.l (%a0)+, %d2 /* go up to end address */
222 move.l %d2, (%a1)+
223
224 cmp.l %a1, %a2
225 bhi.s .g_tloop
226
227.g_no_tail:
228 movem.l (%sp), %d2-%d5/%a2-%a6 /* restore registers */
229 lea.l (9*4, %sp), %sp
142 rts 230 rts
231
143.gd_end: 232.gd_end:
144 .size lcd_grey_data,.gd_end-lcd_grey_data 233 .size lcd_grey_data,.gd_end-lcd_grey_data