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author | Amaury Pouly <amaury.pouly@gmail.com> | 2012-05-21 16:28:12 +0200 |
---|---|---|
committer | Amaury Pouly <amaury.pouly@gmail.com> | 2012-05-21 16:29:11 +0200 |
commit | cd7a478ec1a48facc6729bd51aa1016cc7263081 (patch) | |
tree | c48131ac6b9272ceab393517dbff319e655f2b96 /firmware/target/arm | |
parent | 0ebfb937aaa073282415e561f8d1f150813a00fd (diff) | |
download | rockbox-cd7a478ec1a48facc6729bd51aa1016cc7263081.tar.gz rockbox-cd7a478ec1a48facc6729bd51aa1016cc7263081.zip |
imx233: enable PLL on startup
Implement PLL enabling/disable and unconditionally power the PLL
on startup. This is needed at least on the Zen X-Fi2.
Change-Id: Ib9ddfdeaf973cedded4b3586dd16aa95a61e78ba
Diffstat (limited to 'firmware/target/arm')
-rw-r--r-- | firmware/target/arm/imx233/clkctrl-imx233.c | 11 | ||||
-rw-r--r-- | firmware/target/arm/imx233/clkctrl-imx233.h | 3 | ||||
-rw-r--r-- | firmware/target/arm/imx233/system-imx233.c | 1 |
3 files changed, 14 insertions, 1 deletions
diff --git a/firmware/target/arm/imx233/clkctrl-imx233.c b/firmware/target/arm/imx233/clkctrl-imx233.c index 064ee8013b..a5fc706350 100644 --- a/firmware/target/arm/imx233/clkctrl-imx233.c +++ b/firmware/target/arm/imx233/clkctrl-imx233.c | |||
@@ -43,6 +43,17 @@ void imx233_clkctrl_enable_clock(enum imx233_clock_t clk, bool enable) | |||
43 | { | 43 | { |
44 | case CLK_PIX: REG = &HW_CLKCTRL_PIX; break; | 44 | case CLK_PIX: REG = &HW_CLKCTRL_PIX; break; |
45 | case CLK_SSP: REG = &HW_CLKCTRL_SSP; break; | 45 | case CLK_SSP: REG = &HW_CLKCTRL_SSP; break; |
46 | case CLK_PLL: | ||
47 | { | ||
48 | if(enable) | ||
49 | { | ||
50 | __REG_SET(HW_CLKCTRL_PLLCTRL0) = HW_CLKCTRL_PLLCTRL0__POWER; | ||
51 | while(!(HW_CLKCTRL_PLLCTRL1 & HW_CLKCTRL_PLLCTRL1__LOCK)); | ||
52 | } | ||
53 | else | ||
54 | __REG_CLR(HW_CLKCTRL_PLLCTRL0) = HW_CLKCTRL_PLLCTRL0__POWER; | ||
55 | return; | ||
56 | } | ||
46 | default: return; | 57 | default: return; |
47 | } | 58 | } |
48 | 59 | ||
diff --git a/firmware/target/arm/imx233/clkctrl-imx233.h b/firmware/target/arm/imx233/clkctrl-imx233.h index d49e8b2802..c887391602 100644 --- a/firmware/target/arm/imx233/clkctrl-imx233.h +++ b/firmware/target/arm/imx233/clkctrl-imx233.h | |||
@@ -34,6 +34,7 @@ | |||
34 | #define HW_CLKCTRL_PLLCTRL0__DIV_SEL_BM (3 << 20) | 34 | #define HW_CLKCTRL_PLLCTRL0__DIV_SEL_BM (3 << 20) |
35 | 35 | ||
36 | #define HW_CLKCTRL_PLLCTRL1 (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x10)) | 36 | #define HW_CLKCTRL_PLLCTRL1 (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x10)) |
37 | #define HW_CLKCTRL_PLLCTRL1__LOCK (1 << 31) | ||
37 | 38 | ||
38 | #define HW_CLKCTRL_CPU (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x20)) | 39 | #define HW_CLKCTRL_CPU (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x20)) |
39 | #define HW_CLKCTRL_CPU__DIV_CPU_BP 0 | 40 | #define HW_CLKCTRL_CPU__DIV_CPU_BP 0 |
@@ -121,7 +122,7 @@ enum imx233_clock_t | |||
121 | CLK_IO, /* freq, frac */ | 122 | CLK_IO, /* freq, frac */ |
122 | CLK_CPU, /* freq, div, frac, bypass */ | 123 | CLK_CPU, /* freq, div, frac, bypass */ |
123 | CLK_HBUS, /* freq, div, frac */ | 124 | CLK_HBUS, /* freq, div, frac */ |
124 | CLK_PLL, /* freq */ | 125 | CLK_PLL, /* freq, enable */ |
125 | CLK_XTAL, /* freq */ | 126 | CLK_XTAL, /* freq */ |
126 | CLK_EMI, /* freq */ | 127 | CLK_EMI, /* freq */ |
127 | CLK_XBUS, /* freq, div */ | 128 | CLK_XBUS, /* freq, div */ |
diff --git a/firmware/target/arm/imx233/system-imx233.c b/firmware/target/arm/imx233/system-imx233.c index 07c29a8644..bcdb47ebaa 100644 --- a/firmware/target/arm/imx233/system-imx233.c +++ b/firmware/target/arm/imx233/system-imx233.c | |||
@@ -100,6 +100,7 @@ void memory_init(void) | |||
100 | 100 | ||
101 | void system_init(void) | 101 | void system_init(void) |
102 | { | 102 | { |
103 | imx233_clkctrl_enable_clock(CLK_PLL, true); | ||
103 | imx233_rtc_init(); | 104 | imx233_rtc_init(); |
104 | imx233_icoll_init(); | 105 | imx233_icoll_init(); |
105 | imx233_pinctrl_init(); | 106 | imx233_pinctrl_init(); |