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authorMichael Sparmann <theseven@rockbox.org>2011-01-02 22:51:47 +0000
committerMichael Sparmann <theseven@rockbox.org>2011-01-02 22:51:47 +0000
commit9339be1279eb2b64a268e3a7a039ef8031dae4b3 (patch)
tree651a91b8fa884630fd1cb5684fbc5787136ac98e /firmware/target/arm
parent0ce42df073468ab3b9f714350f8a745ea178f020 (diff)
downloadrockbox-9339be1279eb2b64a268e3a7a039ef8031dae4b3.tar.gz
rockbox-9339be1279eb2b64a268e3a7a039ef8031dae4b3.zip
Rework ATA driver to get rid of lots of target-specific constants and allow for non-memory-mapped task file registers.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28950 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm')
-rw-r--r--firmware/target/arm/archos/av300/ata-target.h26
-rw-r--r--firmware/target/arm/ata-target.h31
-rw-r--r--firmware/target/arm/imx31/ata-target.h26
-rw-r--r--firmware/target/arm/s3c2440/gigabeat-fx/ata-target.h26
-rw-r--r--firmware/target/arm/tms320dm320/creative-zvm/ata-target.h26
-rw-r--r--firmware/target/arm/tms320dm320/creative-zvm/dma-creativezvm.c6
-rw-r--r--firmware/target/arm/tms320dm320/mrobe-500/ata-target.h26
7 files changed, 5 insertions, 162 deletions
diff --git a/firmware/target/arm/archos/av300/ata-target.h b/firmware/target/arm/archos/av300/ata-target.h
index 9c59acc460..bc3a19a6b4 100644
--- a/firmware/target/arm/archos/av300/ata-target.h
+++ b/firmware/target/arm/archos/av300/ata-target.h
@@ -33,32 +33,6 @@
33#define ATA_CONTROL (*((volatile unsigned char*)(ATA_IOBASE + 0x340))) 33#define ATA_CONTROL (*((volatile unsigned char*)(ATA_IOBASE + 0x340)))
34#define ATA_COMMAND (*((volatile unsigned char*)(ATA_IOBASE + 0x380))) 34#define ATA_COMMAND (*((volatile unsigned char*)(ATA_IOBASE + 0x380)))
35 35
36#define STATUS_BSY 0x80
37#define STATUS_RDY 0x40
38#define STATUS_DF 0x20
39#define STATUS_DRQ 0x08
40#define STATUS_ERR 0x01
41#define ERROR_ABRT 0x04
42#define ERROR_IDNF 0x10
43
44#define WRITE_PATTERN1 0xa5
45#define WRITE_PATTERN2 0x5a
46#define WRITE_PATTERN3 0xaa
47#define WRITE_PATTERN4 0x55
48
49#define READ_PATTERN1 0xa5
50#define READ_PATTERN2 0x5a
51#define READ_PATTERN3 0xaa
52#define READ_PATTERN4 0x55
53
54#define READ_PATTERN1_MASK 0xff
55#define READ_PATTERN2_MASK 0xff
56#define READ_PATTERN3_MASK 0xff
57#define READ_PATTERN4_MASK 0xff
58
59#define SET_REG(reg,val) reg = (val)
60#define SET_16BITREG(reg,val) reg = (val)
61
62void ata_reset(void); 36void ata_reset(void);
63void ata_enable(bool on); 37void ata_enable(bool on);
64bool ata_is_coldstart(void); 38bool ata_is_coldstart(void);
diff --git a/firmware/target/arm/ata-target.h b/firmware/target/arm/ata-target.h
index c9d789d092..12415c33e8 100644
--- a/firmware/target/arm/ata-target.h
+++ b/firmware/target/arm/ata-target.h
@@ -32,43 +32,16 @@
32#define ATA_COMMAND (*((volatile unsigned char*)(IDE_BASE + 0x1fc))) 32#define ATA_COMMAND (*((volatile unsigned char*)(IDE_BASE + 0x1fc)))
33#define ATA_CONTROL (*((volatile unsigned char*)(IDE_BASE + 0x3f8))) 33#define ATA_CONTROL (*((volatile unsigned char*)(IDE_BASE + 0x3f8)))
34 34
35#define STATUS_BSY 0x80
36#define STATUS_RDY 0x40
37#define STATUS_DF 0x20
38#define STATUS_DRQ 0x08
39#define STATUS_ERR 0x01
40#define ERROR_ABRT 0x04
41#define ERROR_IDNF 0x10
42
43#define WRITE_PATTERN1 0xa5
44#define WRITE_PATTERN2 0x5a
45#define WRITE_PATTERN3 0xaa
46#define WRITE_PATTERN4 0x55
47
48#define READ_PATTERN1 0xa5
49#define READ_PATTERN2 0x5a
50#define READ_PATTERN3 0xaa
51#define READ_PATTERN4 0x55
52
53#define READ_PATTERN1_MASK 0xff
54#define READ_PATTERN2_MASK 0xff
55#define READ_PATTERN3_MASK 0xff
56#define READ_PATTERN4_MASK 0xff
57
58#if (CONFIG_CPU == PP5002) 35#if (CONFIG_CPU == PP5002)
59 36
60#define SET_REG(reg,val) do { reg = (val); \ 37#define ATA_OUT8(reg,val) do { reg = (val); \
61 while (!(IDE_CFG_STATUS & 0x40)); \ 38 while (!(IDE_CFG_STATUS & 0x40)); \
62 } while (0) 39 } while (0)
63#define SET_16BITREG(reg,val) reg = (val)
64 40
65/* Plain C reading and writing. See comment in ata-as-arm.S */ 41/* Plain C reading and writing. See comment in ata-as-arm.S */
66 42
67#elif defined CPU_PP502x 43#elif defined CPU_PP502x
68 44
69#define SET_REG(reg,val) reg = (val)
70#define SET_16BITREG(reg,val) reg = (val)
71
72/* asm optimized reading and writing */ 45/* asm optimized reading and writing */
73#define ATA_OPTIMIZED_READING 46#define ATA_OPTIMIZED_READING
74#define ATA_OPTIMIZED_WRITING 47#define ATA_OPTIMIZED_WRITING
diff --git a/firmware/target/arm/imx31/ata-target.h b/firmware/target/arm/imx31/ata-target.h
index f7f84f82e9..da1902acea 100644
--- a/firmware/target/arm/imx31/ata-target.h
+++ b/firmware/target/arm/imx31/ata-target.h
@@ -46,32 +46,6 @@
46#define ATA_COMMAND ATA_DRIVE_COMMAND 46#define ATA_COMMAND ATA_DRIVE_COMMAND
47#define ATA_CONTROL ATA_DRIVE_CONTROL 47#define ATA_CONTROL ATA_DRIVE_CONTROL
48 48
49#define STATUS_BSY 0x80
50#define STATUS_RDY 0x40
51#define STATUS_DF 0x20
52#define STATUS_DRQ 0x08
53#define STATUS_ERR 0x01
54#define ERROR_ABRT 0x04
55#define ERROR_IDNF 0x10
56
57#define WRITE_PATTERN1 0xa5
58#define WRITE_PATTERN2 0x5a
59#define WRITE_PATTERN3 0xaa
60#define WRITE_PATTERN4 0x55
61
62#define READ_PATTERN1 0xa5
63#define READ_PATTERN2 0x5a
64#define READ_PATTERN3 0xaa
65#define READ_PATTERN4 0x55
66
67#define READ_PATTERN1_MASK 0xff
68#define READ_PATTERN2_MASK 0xff
69#define READ_PATTERN3_MASK 0xff
70#define READ_PATTERN4_MASK 0xff
71
72#define SET_REG(reg,val) reg = (val)
73#define SET_16BITREG(reg,val) reg = (val)
74
75void ata_reset(void); 49void ata_reset(void);
76void ata_device_init(void); 50void ata_device_init(void);
77bool ata_is_coldstart(void); 51bool ata_is_coldstart(void);
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/ata-target.h b/firmware/target/arm/s3c2440/gigabeat-fx/ata-target.h
index 01cdbb9ddb..95cbaa11cf 100644
--- a/firmware/target/arm/s3c2440/gigabeat-fx/ata-target.h
+++ b/firmware/target/arm/s3c2440/gigabeat-fx/ata-target.h
@@ -44,32 +44,6 @@ void copy_read_sectors(unsigned char* buf, int wordcount);
44#define ATA_COMMAND (*((volatile unsigned char*)(ATA_IOBASE + 0x0E))) 44#define ATA_COMMAND (*((volatile unsigned char*)(ATA_IOBASE + 0x0E)))
45#define ATA_CONTROL (*((volatile unsigned char*)(0x20000000 + 0x1C))) 45#define ATA_CONTROL (*((volatile unsigned char*)(0x20000000 + 0x1C)))
46 46
47#define STATUS_BSY 0x80
48#define STATUS_RDY 0x40
49#define STATUS_DF 0x20
50#define STATUS_DRQ 0x08
51#define STATUS_ERR 0x01
52#define ERROR_ABRT 0x04
53#define ERROR_IDNF 0x10
54
55#define WRITE_PATTERN1 0xa5
56#define WRITE_PATTERN2 0x5a
57#define WRITE_PATTERN3 0xaa
58#define WRITE_PATTERN4 0x55
59
60#define READ_PATTERN1 0xa5
61#define READ_PATTERN2 0x5a
62#define READ_PATTERN3 0xaa
63#define READ_PATTERN4 0x55
64
65#define READ_PATTERN1_MASK 0xff
66#define READ_PATTERN2_MASK 0xff
67#define READ_PATTERN3_MASK 0xff
68#define READ_PATTERN4_MASK 0xff
69
70#define SET_REG(reg,val) reg = (val)
71#define SET_16BITREG(reg,val) reg = (val)
72
73void ata_reset(void); 47void ata_reset(void);
74void ata_device_init(void); 48void ata_device_init(void);
75bool ata_is_coldstart(void); 49bool ata_is_coldstart(void);
diff --git a/firmware/target/arm/tms320dm320/creative-zvm/ata-target.h b/firmware/target/arm/tms320dm320/creative-zvm/ata-target.h
index 46713e70c5..1a1648983d 100644
--- a/firmware/target/arm/tms320dm320/creative-zvm/ata-target.h
+++ b/firmware/target/arm/tms320dm320/creative-zvm/ata-target.h
@@ -53,32 +53,6 @@ extern int _ata_write_sectors(IF_MD2(int drive,) unsigned long start, int count,
53#define ATA_COMMAND (*((volatile unsigned char*)(ATA_IOBASE+0xE))) 53#define ATA_COMMAND (*((volatile unsigned char*)(ATA_IOBASE+0xE)))
54#define ATA_CONTROL (*((volatile unsigned char*)(ATA_IOBASE+0x800C))) 54#define ATA_CONTROL (*((volatile unsigned char*)(ATA_IOBASE+0x800C)))
55 55
56#define STATUS_BSY 0x80
57#define STATUS_RDY 0x40
58#define STATUS_DF 0x20
59#define STATUS_DRQ 0x08
60#define STATUS_ERR 0x01
61#define ERROR_ABRT 0x04
62#define ERROR_IDNF 0x10
63
64#define WRITE_PATTERN1 0xa5
65#define WRITE_PATTERN2 0x5a
66#define WRITE_PATTERN3 0xaa
67#define WRITE_PATTERN4 0x55
68
69#define READ_PATTERN1 0xa5
70#define READ_PATTERN2 0x5a
71#define READ_PATTERN3 0xaa
72#define READ_PATTERN4 0x55
73
74#define READ_PATTERN1_MASK 0xff
75#define READ_PATTERN2_MASK 0xff
76#define READ_PATTERN3_MASK 0xff
77#define READ_PATTERN4_MASK 0xff
78
79#define SET_REG(reg,val) reg = (val)
80#define SET_16BITREG(reg,val) reg = (val)
81
82void ata_reset(void); 56void ata_reset(void);
83void ata_device_init(void); 57void ata_device_init(void);
84bool ata_is_coldstart(void); 58bool ata_is_coldstart(void);
diff --git a/firmware/target/arm/tms320dm320/creative-zvm/dma-creativezvm.c b/firmware/target/arm/tms320dm320/creative-zvm/dma-creativezvm.c
index c229b9957a..514fdd5bd9 100644
--- a/firmware/target/arm/tms320dm320/creative-zvm/dma-creativezvm.c
+++ b/firmware/target/arm/tms320dm320/creative-zvm/dma-creativezvm.c
@@ -62,7 +62,7 @@ void dma_ata_read(unsigned char* buf, int shortcount)
62 while((unsigned long)buf & 0x1F) 62 while((unsigned long)buf & 0x1F)
63 { 63 {
64 unsigned short tmp; 64 unsigned short tmp;
65 tmp = ATA_DATA; 65 tmp = ATA_IN16(ATA_DATA);
66 *buf++ = tmp & 0xFF; 66 *buf++ = tmp & 0xFF;
67 *buf++ = tmp >> 8; 67 *buf++ = tmp >> 8;
68 shortcount--; 68 shortcount--;
@@ -86,7 +86,7 @@ void dma_ata_read(unsigned char* buf, int shortcount)
86 if(shortcount % 2) 86 if(shortcount % 2)
87 { 87 {
88 unsigned short tmp; 88 unsigned short tmp;
89 tmp = ATA_DATA; 89 tmp = ATA_IN16(ATA_DATA);
90 *buf++ = tmp & 0xFF; 90 *buf++ = tmp & 0xFF;
91 *buf++ = tmp >> 8; 91 *buf++ = tmp >> 8;
92 } 92 }
@@ -102,7 +102,7 @@ void dma_ata_write(unsigned char* buf, int wordcount)
102 unsigned short tmp; 102 unsigned short tmp;
103 tmp = (unsigned short) *buf++; 103 tmp = (unsigned short) *buf++;
104 tmp |= (unsigned short) *buf++ << 8; 104 tmp |= (unsigned short) *buf++ << 8;
105 SET_16BITREG(ATA_DATA, tmp); 105 ATA_OUT16(ATA_DATA, tmp);
106 wordcount--; 106 wordcount--;
107 } 107 }
108 108
diff --git a/firmware/target/arm/tms320dm320/mrobe-500/ata-target.h b/firmware/target/arm/tms320dm320/mrobe-500/ata-target.h
index 0abeb2e9e7..ca75876259 100644
--- a/firmware/target/arm/tms320dm320/mrobe-500/ata-target.h
+++ b/firmware/target/arm/tms320dm320/mrobe-500/ata-target.h
@@ -49,32 +49,6 @@ void copy_write_sectors(const unsigned char* buf, int wordcount);
49#define ATA_COMMAND (*((volatile unsigned char*)(REGISTER_OFFSET + (0x07 << IDE_SHIFT)))) 49#define ATA_COMMAND (*((volatile unsigned char*)(REGISTER_OFFSET + (0x07 << IDE_SHIFT))))
50#define ATA_CONTROL (*((volatile unsigned char*)(CONTROL_OFFSET + (0x06 << IDE_SHIFT)))) 50#define ATA_CONTROL (*((volatile unsigned char*)(CONTROL_OFFSET + (0x06 << IDE_SHIFT))))
51 51
52#define STATUS_BSY 0x80
53#define STATUS_RDY 0x40
54#define STATUS_DF 0x20
55#define STATUS_DRQ 0x08
56#define STATUS_ERR 0x01
57#define ERROR_ABRT 0x04
58#define ERROR_IDNF 0x10
59
60#define WRITE_PATTERN1 0xa5
61#define WRITE_PATTERN2 0x5a
62#define WRITE_PATTERN3 0xaa
63#define WRITE_PATTERN4 0x55
64
65#define READ_PATTERN1 0xa5
66#define READ_PATTERN2 0x5a
67#define READ_PATTERN3 0xaa
68#define READ_PATTERN4 0x55
69
70#define READ_PATTERN1_MASK 0xff
71#define READ_PATTERN2_MASK 0xff
72#define READ_PATTERN3_MASK 0xff
73#define READ_PATTERN4_MASK 0xff
74
75#define SET_REG(reg,val) reg = (val)
76#define SET_16BITREG(reg,val) reg = (val)
77
78void ata_reset(void); 52void ata_reset(void);
79void ata_device_init(void); 53void ata_device_init(void);
80bool ata_is_coldstart(void); 54bool ata_is_coldstart(void);