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authorRafaël Carré <rafael.carre@gmail.com>2008-12-04 21:55:20 +0000
committerRafaël Carré <rafael.carre@gmail.com>2008-12-04 21:55:20 +0000
commit38e97057a9f9bf3c3f09c128266874c0cca89950 (patch)
tree8026e3696d7540dc79fdb892d3e1fb97c6e0d17c /firmware/target/arm
parent8e19a739bef0114d6a0367b5239890eff6203156 (diff)
downloadrockbox-38e97057a9f9bf3c3f09c128266874c0cca89950.tar.gz
rockbox-38e97057a9f9bf3c3f09c128266874c0cca89950.zip
Sansa AMS: Don't allocate stack in irq_handler
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19338 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm')
-rw-r--r--firmware/target/arm/as3525/system-as3525.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c
index 82a0a01795..649ba77527 100644
--- a/firmware/target/arm/as3525/system-as3525.c
+++ b/firmware/target/arm/as3525/system-as3525.c
@@ -104,8 +104,7 @@ void irq_handler(void)
104 * Based on: linux/arch/arm/kernel/entry-armv.S and system-meg-fx.c 104 * Based on: linux/arch/arm/kernel/entry-armv.S and system-meg-fx.c
105 */ 105 */
106 106
107 asm volatile( "stmfd sp!, {r0-r7, ip, lr} \n" /* Store context */ 107 asm volatile( "stmfd sp!, {r0-r7, ip, lr} \n" );/* Store context */
108 "sub sp, sp, #8 \n"); /* Reserve stack */
109 108
110 unsigned int irq_no = 0; 109 unsigned int irq_no = 0;
111 int status = VIC_IRQ_STATUS; 110 int status = VIC_IRQ_STATUS;
@@ -114,8 +113,7 @@ void irq_handler(void)
114 113
115 irqvector[irq_no](); 114 irqvector[irq_no]();
116 115
117 asm volatile( "add sp, sp, #8 \n" /* Cleanup stack */ 116 asm volatile( "ldmfd sp!, {r0-r7, ip, lr} \n" /* Restore context */
118 "ldmfd sp!, {r0-r7, ip, lr} \n" /* Restore context */
119 "subs pc, lr, #4 \n"); /* Return from IRQ */ 117 "subs pc, lr, #4 \n"); /* Return from IRQ */
120} 118}
121 119