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author | Dave Chapman <dave@dchapman.com> | 2007-01-01 12:09:45 +0000 |
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committer | Dave Chapman <dave@dchapman.com> | 2007-01-01 12:09:45 +0000 |
commit | 147693819d3275ec9eba8b580fa6ff8ada9896f3 (patch) | |
tree | a92f145b79b5248ab0550e8715ac1c479451d6b3 /firmware/target/arm | |
parent | 9d9b8c08de68f158bf9967a8ec340b10e25b840b (diff) | |
download | rockbox-147693819d3275ec9eba8b580fa6ff8ada9896f3.tar.gz rockbox-147693819d3275ec9eba8b580fa6ff8ada9896f3.zip |
Split the enable_fiq(fiq_handler) function into separate set_fiq_handler(fiq_handler) and enable_fiq(void) functions. This allows temporary disabling of the FIQ without knowing which fiq handler is in use.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11875 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm')
-rw-r--r-- | firmware/target/arm/gigabeat/meg-fx/pcm-meg-fx.c | 3 | ||||
-rw-r--r-- | firmware/target/arm/pcm-pp.c | 9 |
2 files changed, 8 insertions, 4 deletions
diff --git a/firmware/target/arm/gigabeat/meg-fx/pcm-meg-fx.c b/firmware/target/arm/gigabeat/meg-fx/pcm-meg-fx.c index 936b8362d7..04e1bbbd47 100644 --- a/firmware/target/arm/gigabeat/meg-fx/pcm-meg-fx.c +++ b/firmware/target/arm/gigabeat/meg-fx/pcm-meg-fx.c | |||
@@ -146,7 +146,8 @@ void pcm_play_dma_start(const void *addr, size_t size) | |||
146 | /* clear pending DMA interrupt */ | 146 | /* clear pending DMA interrupt */ |
147 | SRCPND = 1<<19; | 147 | SRCPND = 1<<19; |
148 | 148 | ||
149 | enable_fiq(fiq); | 149 | set_fiq_handler(fiq); |
150 | enable_fiq(); | ||
150 | 151 | ||
151 | /* unmask the DMA interrupt */ | 152 | /* unmask the DMA interrupt */ |
152 | INTMSK &= ~(1<<19); | 153 | INTMSK &= ~(1<<19); |
diff --git a/firmware/target/arm/pcm-pp.c b/firmware/target/arm/pcm-pp.c index f6f71d774e..9ee3acd94e 100644 --- a/firmware/target/arm/pcm-pp.c +++ b/firmware/target/arm/pcm-pp.c | |||
@@ -217,7 +217,8 @@ void pcm_play_dma_start(const void *addr, size_t size) | |||
217 | #endif | 217 | #endif |
218 | 218 | ||
219 | /* Clear the FIQ disable bit in cpsr_c */ | 219 | /* Clear the FIQ disable bit in cpsr_c */ |
220 | enable_fiq(fiq); | 220 | set_fiq_handler(fiq); |
221 | enable_fiq(); | ||
221 | 222 | ||
222 | /* Enable playback FIFO */ | 223 | /* Enable playback FIFO */ |
223 | #if CONFIG_CPU == PP5020 | 224 | #if CONFIG_CPU == PP5020 |
@@ -290,7 +291,8 @@ void pcm_play_pause_unpause(void) | |||
290 | { | 291 | { |
291 | /* Enable the FIFO and fill it */ | 292 | /* Enable the FIFO and fill it */ |
292 | 293 | ||
293 | enable_fiq(fiq); | 294 | set_fiq_handler(fiq); |
295 | enable_fiq(); | ||
294 | 296 | ||
295 | /* Enable playback FIFO */ | 297 | /* Enable playback FIFO */ |
296 | #if CONFIG_CPU == PP5020 | 298 | #if CONFIG_CPU == PP5020 |
@@ -459,7 +461,8 @@ void pcm_rec_dma_start(void *addr, size_t size) | |||
459 | /* enable record fifo */ | 461 | /* enable record fifo */ |
460 | outl(inl(0x70002800) | 0x10000000, 0x70002800); | 462 | outl(inl(0x70002800) | 0x10000000, 0x70002800); |
461 | 463 | ||
462 | enable_fiq(fiq_record); | 464 | set_fiq_handler(fiq_record); |
465 | enable_fiq(); | ||
463 | } | 466 | } |
464 | 467 | ||
465 | void pcm_close_recording(void) | 468 | void pcm_close_recording(void) |