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author | Jonathan Gordon <rockbox@jdgordon.info> | 2007-10-01 05:27:43 +0000 |
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committer | Jonathan Gordon <rockbox@jdgordon.info> | 2007-10-01 05:27:43 +0000 |
commit | 03f45d3affcee6d8ffb58f1cc6f414284ed418b4 (patch) | |
tree | 99ebe8a4ef8e86de4770ebe83a65a3b6156db82f /firmware/target/arm | |
parent | ea47ee64f02030c64e0472939ea3c588ce7e8dab (diff) | |
download | rockbox-03f45d3affcee6d8ffb58f1cc6f414284ed418b4.tar.gz rockbox-03f45d3affcee6d8ffb58f1cc6f414284ed418b4.zip |
spi is shared between the rtc and tsc2100
adds the very begining of the rtc driver (only reads the time currently
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14935 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm')
-rw-r--r-- | firmware/target/arm/tms320dm320/spi-dm320.c | 50 | ||||
-rw-r--r-- | firmware/target/arm/tms320dm320/spi-target.h | 10 |
2 files changed, 49 insertions, 11 deletions
diff --git a/firmware/target/arm/tms320dm320/spi-dm320.c b/firmware/target/arm/tms320dm320/spi-dm320.c index c47ab8f6ed..31fe63d9dd 100644 --- a/firmware/target/arm/tms320dm320/spi-dm320.c +++ b/firmware/target/arm/tms320dm320/spi-dm320.c | |||
@@ -24,18 +24,43 @@ | |||
24 | * with this program; if not, write to the Free Software Foundation, Inc., | 24 | * with this program; if not, write to the Free Software Foundation, Inc., |
25 | * 675 Mass Ave, Cambridge, MA 02139, USA. | 25 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
26 | */ | 26 | */ |
27 | 27 | #include "kernel.h" | |
28 | #include "system.h" | 28 | #include "system.h" |
29 | #include "spi.h" | ||
30 | |||
31 | #define GIO_TS_ENABLE (1<<2) | ||
32 | #define GIO_RTC_ENABLE (1<<12) | ||
33 | |||
34 | struct mutex spi_lock; | ||
29 | 35 | ||
30 | #define GIO_TS_ENABLE (1<<2) | 36 | struct SPI_info { |
31 | #define clr_gio_enable() IO_GIO_BITSET1=GIO_TS_ENABLE | 37 | volatile unsigned short *setreg; |
32 | #define set_gio_enable() IO_GIO_BITCLR1=GIO_TS_ENABLE | 38 | volatile unsigned short *clrreg; |
39 | int bit; | ||
40 | }; | ||
41 | #define reg(a) (PHY_IO_BASE+a) | ||
42 | struct SPI_info spi_targets[] = | ||
43 | { | ||
44 | [SPI_target_TSC2100] = { reg(0x0594), reg(0x058E), GIO_TS_ENABLE }, | ||
45 | [SPI_target_RX5X348AB] = { reg(0x058C), reg(0x0592), GIO_RTC_ENABLE }, | ||
46 | }; | ||
47 | |||
48 | static void spi_disable_all_targets(void) | ||
49 | { | ||
50 | int i; | ||
51 | for(i=0;i<SPI_MAX_TARGETS;i++) | ||
52 | { | ||
53 | *spi_targets[i].clrreg = spi_targets[i].bit; | ||
54 | } | ||
55 | } | ||
33 | 56 | ||
34 | int spi_block_transfer(const uint8_t *tx_bytes, unsigned int tx_size, | 57 | int spi_block_transfer(enum SPI_target target, |
58 | const uint8_t *tx_bytes, unsigned int tx_size, | ||
35 | uint8_t *rx_bytes, unsigned int rx_size) | 59 | uint8_t *rx_bytes, unsigned int rx_size) |
36 | { | 60 | { |
61 | spinlock_lock(&spi_lock); | ||
37 | /* Activate the slave select pin */ | 62 | /* Activate the slave select pin */ |
38 | set_gio_enable(); | 63 | *spi_targets[target].setreg = spi_targets[target].bit; |
39 | 64 | ||
40 | while (tx_size--) | 65 | while (tx_size--) |
41 | { | 66 | { |
@@ -58,13 +83,15 @@ int spi_block_transfer(const uint8_t *tx_bytes, unsigned int tx_size, | |||
58 | *rx_bytes++ = data & 0xff; | 83 | *rx_bytes++ = data & 0xff; |
59 | } | 84 | } |
60 | 85 | ||
61 | clr_gio_enable(); | 86 | *spi_targets[target].clrreg = spi_targets[target].bit; |
62 | 87 | ||
88 | spinlock_unlock(&spi_lock); | ||
63 | return 0; | 89 | return 0; |
64 | } | 90 | } |
65 | 91 | ||
66 | void spi_init(void) | 92 | void spi_init(void) |
67 | { | 93 | { |
94 | spinlock_init(&spi_lock); | ||
68 | /* Set SCLK idle level = 0 */ | 95 | /* Set SCLK idle level = 0 */ |
69 | IO_SERIAL0_MODE |= (1<<10); | 96 | IO_SERIAL0_MODE |= (1<<10); |
70 | 97 | ||
@@ -72,6 +99,9 @@ void spi_init(void) | |||
72 | IO_SERIAL0_TX_ENABLE = 0x0001; | 99 | IO_SERIAL0_TX_ENABLE = 0x0001; |
73 | 100 | ||
74 | /* Set GIO 18 to output for touch screen slave enable */ | 101 | /* Set GIO 18 to output for touch screen slave enable */ |
75 | IO_GIO_DIR1&=~GIO_TS_ENABLE; | 102 | IO_GIO_DIR1 &= ~GIO_TS_ENABLE; |
76 | clr_gio_enable(); | 103 | /* Set GIO 12 to output for rtc slave enable */ |
104 | IO_GIO_DIR0 &= ~GIO_RTC_ENABLE; | ||
105 | |||
106 | spi_disable_all_targets(); /* make sure only one is ever enabled at a time */ | ||
77 | } | 107 | } |
diff --git a/firmware/target/arm/tms320dm320/spi-target.h b/firmware/target/arm/tms320dm320/spi-target.h index 866919dc27..7123fc1c05 100644 --- a/firmware/target/arm/tms320dm320/spi-target.h +++ b/firmware/target/arm/tms320dm320/spi-target.h | |||
@@ -21,9 +21,17 @@ | |||
21 | #define SPI_TARGET_H | 21 | #define SPI_TARGET_H |
22 | 22 | ||
23 | #include <inttypes.h> | 23 | #include <inttypes.h> |
24 | #include <stdbool.h> | ||
25 | |||
26 | enum SPI_target { | ||
27 | SPI_target_TSC2100 = 0, | ||
28 | SPI_target_RX5X348AB, | ||
29 | SPI_MAX_TARGETS, | ||
30 | }; | ||
24 | 31 | ||
25 | void spi_init(void); | 32 | void spi_init(void); |
26 | int spi_block_transfer(const uint8_t *tx_bytes, unsigned int tx_size, | 33 | int spi_block_transfer(enum SPI_target target, |
34 | const uint8_t *tx_bytes, unsigned int tx_size, | ||
27 | uint8_t *rx_bytes, unsigned int rx_size); | 35 | uint8_t *rx_bytes, unsigned int rx_size); |
28 | 36 | ||
29 | #endif | 37 | #endif |