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authorMichael Sevakis <jethead71@rockbox.org>2011-03-02 08:49:38 +0000
committerMichael Sevakis <jethead71@rockbox.org>2011-03-02 08:49:38 +0000
commit12375d1d3aa41f7d277a9af584c7b810b636ec95 (patch)
treefc9ce8029a6910a8dac71b3bf60c71155a01eea4 /firmware/target/arm/tms320dm320
parent05e180a1308a095d51d51d0e047fcd44425ea88f (diff)
downloadrockbox-12375d1d3aa41f7d277a9af584c7b810b636ec95.tar.gz
rockbox-12375d1d3aa41f7d277a9af584c7b810b636ec95.zip
Merge functionality of wakeups and semaphores-- fewer APIs and object types. semaphore_wait takes a timeout now so codecs and plugins have to be made incompatible. Don't make semaphores for targets not using them.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29492 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/tms320dm320')
-rw-r--r--firmware/target/arm/tms320dm320/creative-zvm/dma-creativezvm.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/firmware/target/arm/tms320dm320/creative-zvm/dma-creativezvm.c b/firmware/target/arm/tms320dm320/creative-zvm/dma-creativezvm.c
index d1408fee70..6a74ff5e57 100644
--- a/firmware/target/arm/tms320dm320/creative-zvm/dma-creativezvm.c
+++ b/firmware/target/arm/tms320dm320/creative-zvm/dma-creativezvm.c
@@ -37,14 +37,14 @@
37#define CF_START 0x40000000 37#define CF_START 0x40000000
38#define SSFDC_START 0x48000000 38#define SSFDC_START 0x48000000
39 39
40static struct wakeup transfer_completion_signal; 40static struct semaphore transfer_completion_signal;
41 41
42static bool dma_in_progress = false; 42static bool dma_in_progress = false;
43 43
44void MTC0(void) 44void MTC0(void)
45{ 45{
46 IO_INTC_IRQ1 = INTR_IRQ1_MTC0; 46 IO_INTC_IRQ1 = INTR_IRQ1_MTC0;
47 wakeup_signal(&transfer_completion_signal); 47 semaphore_release(&transfer_completion_signal);
48 dma_in_progress = false; 48 dma_in_progress = false;
49} 49}
50 50
@@ -59,7 +59,7 @@ void dma_start(const void* addr, size_t size)
59void dma_ata_read(unsigned char* buf, int shortcount) 59void dma_ata_read(unsigned char* buf, int shortcount)
60{ 60{
61 if(dma_in_progress) 61 if(dma_in_progress)
62 wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK); 62 semaphore_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
63 63
64 while((unsigned long)buf & 0x1F) 64 while((unsigned long)buf & 0x1F)
65 { 65 {
@@ -83,7 +83,7 @@ void dma_ata_read(unsigned char* buf, int shortcount)
83 IO_EMIF_DMACTL = 3; /* Select MTC->AHB and start transfer */ 83 IO_EMIF_DMACTL = 3; /* Select MTC->AHB and start transfer */
84 84
85 dma_in_progress = true; 85 dma_in_progress = true;
86 wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK); 86 semaphore_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
87 87
88 if(shortcount % 2) 88 if(shortcount % 2)
89 { 89 {
@@ -97,7 +97,7 @@ void dma_ata_read(unsigned char* buf, int shortcount)
97void dma_ata_write(unsigned char* buf, int wordcount) 97void dma_ata_write(unsigned char* buf, int wordcount)
98{ 98{
99 if(dma_in_progress) 99 if(dma_in_progress)
100 wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK); 100 semaphore_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
101 101
102 while((unsigned long)buf & 0x1F) 102 while((unsigned long)buf & 0x1F)
103 { 103 {
@@ -121,12 +121,12 @@ void dma_ata_write(unsigned char* buf, int wordcount)
121 IO_EMIF_DMACTL = 1; /* Select AHB->MTC and start transfer */ 121 IO_EMIF_DMACTL = 1; /* Select AHB->MTC and start transfer */
122 122
123 dma_in_progress = true; 123 dma_in_progress = true;
124 wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK); 124 semaphore_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
125} 125}
126 126
127void dma_init(void) 127void dma_init(void)
128{ 128{
129 IO_INTC_EINT1 |= INTR_EINT1_MTC0; /* enable MTC interrupt */ 129 IO_INTC_EINT1 |= INTR_EINT1_MTC0; /* enable MTC interrupt */
130 wakeup_init(&transfer_completion_signal); 130 semaphore_init(&transfer_completion_signal, 1, 0);
131 dma_in_progress = false; 131 dma_in_progress = false;
132} 132}