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authorTomasz Moń <desowin@gmail.com>2021-07-09 14:16:05 +0200
committerTomasz Moń <desowin@gmail.com>2021-07-09 14:16:05 +0200
commit8de163b8ae139931ddd2daabe8af0bd5fffc67f1 (patch)
tree1a00c4b80fa310bfef00574237d1509019cc9eca /firmware/target/arm/tms320dm320/system-target.h
parent60e2cd6de946c0c473c0e9bfde5b7b1d47a5b28f (diff)
downloadrockbox-8de163b8ae139931ddd2daabe8af0bd5fffc67f1.tar.gz
rockbox-8de163b8ae139931ddd2daabe8af0bd5fffc67f1.zip
Sansa Connect: Fix reported CPU frequency
Make frequency related comments accurate. Disable UART0 clock. Change-Id: I224a3d6656ad53165dcff68ed716fa2c6863240d
Diffstat (limited to 'firmware/target/arm/tms320dm320/system-target.h')
-rw-r--r--firmware/target/arm/tms320dm320/system-target.h7
1 files changed, 6 insertions, 1 deletions
diff --git a/firmware/target/arm/tms320dm320/system-target.h b/firmware/target/arm/tms320dm320/system-target.h
index 1c46e909ed..9aa8b3e213 100644
--- a/firmware/target/arm/tms320dm320/system-target.h
+++ b/firmware/target/arm/tms320dm320/system-target.h
@@ -24,10 +24,15 @@
24#include "system-arm.h" 24#include "system-arm.h"
25#include "mmu-arm.h" 25#include "mmu-arm.h"
26 26
27#define CPUFREQ_SLEEP 32768 27#ifdef SANSA_CONNECT
28#define CPUFREQ_DEFAULT 74250000
29#define CPUFREQ_NORMAL 74250000
30#define CPUFREQ_MAX 148500000
31#else
28#define CPUFREQ_DEFAULT 87500000 32#define CPUFREQ_DEFAULT 87500000
29#define CPUFREQ_NORMAL 87500000 33#define CPUFREQ_NORMAL 87500000
30#define CPUFREQ_MAX 175000000 34#define CPUFREQ_MAX 175000000
35#endif
31 36
32void udelay(int usec); 37void udelay(int usec);
33void mdelay(int msec); 38void mdelay(int msec);