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authorRafaël Carré <rafael.carre@gmail.com>2012-01-07 22:04:12 +0000
committerRafaël Carré <rafael.carre@gmail.com>2012-01-07 22:04:12 +0000
commit28d1af853c5e853e69991b29b5acc6b2e3b1abfe (patch)
tree834e0fc6f66569d500e60b036a66e0bcb01dc259 /firmware/target/arm/tms320dm320/spi-dm320.c
parent12ef8723f8f69ab70e2af7ac8a2cc4b7bf319b96 (diff)
downloadrockbox-28d1af853c5e853e69991b29b5acc6b2e3b1abfe.tar.gz
rockbox-28d1af853c5e853e69991b29b5acc6b2e3b1abfe.zip
Clean spi.h and spi-target.h
Only target-specific (list of SPI targets) go in spi-target.h API go into spi.h git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31615 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/tms320dm320/spi-dm320.c')
-rw-r--r--firmware/target/arm/tms320dm320/spi-dm320.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/firmware/target/arm/tms320dm320/spi-dm320.c b/firmware/target/arm/tms320dm320/spi-dm320.c
index c2e774462a..e9a097b0ea 100644
--- a/firmware/target/arm/tms320dm320/spi-dm320.c
+++ b/firmware/target/arm/tms320dm320/spi-dm320.c
@@ -43,9 +43,12 @@ struct SPI_info {
43 bool clk_invert; 43 bool clk_invert;
44}; 44};
45 45
46static const struct SPI_info spi_targets[] = 46static const struct SPI_info spi_targets[SPI_MAX_TARGETS] =
47{ 47{
48#ifndef CREATIVE_ZVx 48#if defined(CREATIVE_ZVx)
49 [SPI_target_LTV250QV] = { &IO_GIO_BITCLR2, &IO_GIO_BITSET2,
50 GIO_LCD_ENABLE, true, 0x07},
51#elif defined(MROBE_500)
49 [SPI_target_TSC2100] = { &IO_GIO_BITCLR1, &IO_GIO_BITSET1, 52 [SPI_target_TSC2100] = { &IO_GIO_BITCLR1, &IO_GIO_BITSET1,
50 GIO_TS_ENABLE, 0x260D, true}, 53 GIO_TS_ENABLE, 0x260D, true},
51 /* RTC seems to have timing problems if the CLK idles low */ 54 /* RTC seems to have timing problems if the CLK idles low */
@@ -54,9 +57,6 @@ static const struct SPI_info spi_targets[] =
54 /* This appears to work properly idling low, idling high is very glitchy */ 57 /* This appears to work properly idling low, idling high is very glitchy */
55 [SPI_target_BACKLIGHT] = { &IO_GIO_BITCLR1, &IO_GIO_BITSET1, 58 [SPI_target_BACKLIGHT] = { &IO_GIO_BITCLR1, &IO_GIO_BITSET1,
56 GIO_BL_ENABLE, 0x2656, false}, 59 GIO_BL_ENABLE, 0x2656, false},
57#else
58 [SPI_target_LTV250QV] = { &IO_GIO_BITCLR2, &IO_GIO_BITSET2,
59 GIO_LCD_ENABLE, true, 0x07},
60#endif 60#endif
61}; 61};
62 62