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| author | Tomasz Moń <desowin@gmail.com> | 2021-07-09 14:16:05 +0200 |
|---|---|---|
| committer | Tomasz Moń <desowin@gmail.com> | 2021-07-09 14:16:05 +0200 |
| commit | 8de163b8ae139931ddd2daabe8af0bd5fffc67f1 (patch) | |
| tree | 1a00c4b80fa310bfef00574237d1509019cc9eca /firmware/target/arm/tms320dm320/sansa-connect/wifi-sansaconnect.c | |
| parent | 60e2cd6de946c0c473c0e9bfde5b7b1d47a5b28f (diff) | |
| download | rockbox-8de163b8ae139931ddd2daabe8af0bd5fffc67f1.tar.gz rockbox-8de163b8ae139931ddd2daabe8af0bd5fffc67f1.zip | |
Sansa Connect: Fix reported CPU frequency
Make frequency related comments accurate. Disable UART0 clock.
Change-Id: I224a3d6656ad53165dcff68ed716fa2c6863240d
Diffstat (limited to 'firmware/target/arm/tms320dm320/sansa-connect/wifi-sansaconnect.c')
| -rw-r--r-- | firmware/target/arm/tms320dm320/sansa-connect/wifi-sansaconnect.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/firmware/target/arm/tms320dm320/sansa-connect/wifi-sansaconnect.c b/firmware/target/arm/tms320dm320/sansa-connect/wifi-sansaconnect.c index 867b1da477..1f201ca1c9 100644 --- a/firmware/target/arm/tms320dm320/sansa-connect/wifi-sansaconnect.c +++ b/firmware/target/arm/tms320dm320/sansa-connect/wifi-sansaconnect.c | |||
| @@ -40,7 +40,9 @@ void libertas_spi_init(void) | |||
| 40 | IO_SERIAL0_TX_ENABLE = 0x0001; | 40 | IO_SERIAL0_TX_ENABLE = 0x0001; |
| 41 | 41 | ||
| 42 | /* SELSDEN = 0, SLVEN = 0, SIOCLR = 0, SCLKM = 1, MSB = 1, MSSEL = 0, | 42 | /* SELSDEN = 0, SLVEN = 0, SIOCLR = 0, SCLKM = 1, MSB = 1, MSSEL = 0, |
| 43 | * RATE = 2 -> 15MHz | 43 | * RATE = 1 (Bit rate = ARM clock / 2*(RATE + 1))) |
| 44 | * Boosted 148.5 MHz / 4 = 37.125 MHz | ||
| 45 | * Default 74.25 MHz / 4 = 18.5625 MHz | ||
| 44 | */ | 46 | */ |
| 45 | IO_SERIAL0_MODE = 0x0601; | 47 | IO_SERIAL0_MODE = 0x0601; |
| 46 | 48 | ||