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| author | Tomasz Moń <desowin@gmail.com> | 2021-07-09 14:16:05 +0200 |
|---|---|---|
| committer | Tomasz Moń <desowin@gmail.com> | 2021-07-09 14:16:05 +0200 |
| commit | 8de163b8ae139931ddd2daabe8af0bd5fffc67f1 (patch) | |
| tree | 1a00c4b80fa310bfef00574237d1509019cc9eca /firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.c | |
| parent | 60e2cd6de946c0c473c0e9bfde5b7b1d47a5b28f (diff) | |
| download | rockbox-8de163b8ae139931ddd2daabe8af0bd5fffc67f1.tar.gz rockbox-8de163b8ae139931ddd2daabe8af0bd5fffc67f1.zip | |
Sansa Connect: Fix reported CPU frequency
Make frequency related comments accurate. Disable UART0 clock.
Change-Id: I224a3d6656ad53165dcff68ed716fa2c6863240d
Diffstat (limited to 'firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.c')
| -rw-r--r-- | firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.c b/firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.c index 01acc6905e..6fd504a0f8 100644 --- a/firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.c +++ b/firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.c | |||
| @@ -501,7 +501,10 @@ void avr_hid_init(void) | |||
| 501 | bitclr16(&IO_GIO_DIR2, (1 << 0)); | 501 | bitclr16(&IO_GIO_DIR2, (1 << 0)); |
| 502 | avr_hid_release(); | 502 | avr_hid_release(); |
| 503 | 503 | ||
| 504 | /* RATE = 219 (0xDB) -> 200 kHz */ | 504 | /* Master, MSB first, RATE = 219 (Bit rate = ARM clock / 2*(RATE + 1))) |
| 505 | * Boosted 148.5 MHz / 440 = 337.5 kHz | ||
| 506 | * Default 74.25 MHz / 440 = 168.75 kHz | ||
| 507 | */ | ||
| 505 | IO_SERIAL1_MODE = 0x6DB; | 508 | IO_SERIAL1_MODE = 0x6DB; |
| 506 | 509 | ||
| 507 | mutex_init(&avr_mtx); | 510 | mutex_init(&avr_mtx); |