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authorTomasz Moń <desowin@gmail.com>2021-07-08 18:23:18 +0200
committerTomasz Moń <desowin@gmail.com>2021-07-09 09:24:38 +0000
commit60e2cd6de946c0c473c0e9bfde5b7b1d47a5b28f (patch)
tree07ebe2764bc37a0189da55a62312524769a5ecab /firmware/target/arm/tms320dm320/boot.lds
parent2e9b93dc5df5aff35a64c55493bc2d2d74b4aa0d (diff)
downloadrockbox-60e2cd6de946c0c473c0e9bfde5b7b1d47a5b28f.tar.gz
rockbox-60e2cd6de946c0c473c0e9bfde5b7b1d47a5b28f.zip
DM320: Regorganize LCD and TTB memory layout
Do not introduce any change for M:Robe 500 as it uses the two LCD frames in non-obvious way. Sansa Connect and Creative ZVM use only single front framebuffer. Place TTB at DRAM end to minimize memory loss due to alignment. Reserve as little as possible memory for the LCD frames. On Sansa Connect this change extends audio buffer by 858 KiB. Change-Id: I21bdeec4cfba86d71803a39acd651a87e73767e6
Diffstat (limited to 'firmware/target/arm/tms320dm320/boot.lds')
-rw-r--r--firmware/target/arm/tms320dm320/boot.lds60
1 files changed, 40 insertions, 20 deletions
diff --git a/firmware/target/arm/tms320dm320/boot.lds b/firmware/target/arm/tms320dm320/boot.lds
index 2db687d533..8b075f43df 100644
--- a/firmware/target/arm/tms320dm320/boot.lds
+++ b/firmware/target/arm/tms320dm320/boot.lds
@@ -14,22 +14,28 @@ STARTUP(target/arm/tms320dm320/crt0.o)
14#define LCD_NATIVE_HEIGHT LCD_HEIGHT 14#define LCD_NATIVE_HEIGHT LCD_HEIGHT
15#endif 15#endif
16 16
17#define LCD_FUDGE LCD_NATIVE_WIDTH%32
18
19#define LCD_BUFFER_SIZE ((LCD_NATIVE_WIDTH+LCD_FUDGE)*LCD_NATIVE_HEIGHT*2)
20
21/* must be 16Kb (0x4000) aligned */ 17/* must be 16Kb (0x4000) aligned */
22#define TTB_SIZE (0x4000) 18#define TTB_SIZE (0x4000)
23 19
20/* Bootloader only uses/knows about the upper 32 M */
21#define DRAMSIZE (MEMORYSIZE * 0x100000 / 2)
22#define DRAMORIG CONFIG_SDRAM_START+DRAMSIZE
23
24#ifdef MROBE_500
25#define LCD_FUDGE LCD_NATIVE_WIDTH%32
26#define LCD_BUFFER_SIZE ((LCD_NATIVE_WIDTH+LCD_FUDGE)*LCD_NATIVE_HEIGHT*2)
24/* Give this some memory to allow it to align to the MMU boundary. 27/* Give this some memory to allow it to align to the MMU boundary.
25 * Note that since there are two buffers (YUV/RGB) it calculates the approximate 28 * Note that since there are two buffers (YUV/RGB) it calculates the approximate
26 * memory needed in steps of 1 Meg. 29 * memory needed in steps of 1 Meg.
27 */ 30 */
28#define LCD_TTB_AREA 0x100000*((LCD_BUFFER_SIZE>>19)+1) 31#define LCD_TTB_AREA (0x100000*((LCD_BUFFER_SIZE>>19)+1))
29 32/* End of the audio buffer, where the codec buffer starts */
30/* Bootloader only uses/knows about the upper 32 M */ 33#define TTB_BEGIN (DRAMORIG + DRAMSIZE - LCD_TTB_AREA)
31#define DRAMORIG CONFIG_SDRAM_START+0x02000000 34#else
32#define DRAMSIZE (MEMORYSIZE * 0x80000) 35#define LCD_BUFFER_SIZE (LCD_NATIVE_WIDTH*LCD_NATIVE_HEIGHT*2)
36#define LCD_TTB_AREA (TTB_SIZE + LCD_BUFFER_SIZE)
37#define LCD_BEGIN (DRAMORIG + DRAMSIZE - LCD_TTB_AREA)
38#endif
33 39
34#define IRAMORIG 0x00000000 40#define IRAMORIG 0x00000000
35#define IRAMSIZE 0x4000 41#define IRAMSIZE 0x4000
@@ -59,9 +65,6 @@ PRO_STACK_SIZE = 0x2000;
59IRQ_STACK_SIZE = 0x400; 65IRQ_STACK_SIZE = 0x400;
60FIQ_STACK_SIZE = 0x400; 66FIQ_STACK_SIZE = 0x400;
61 67
62/* End of the audio buffer, where the codec buffer starts */
63#define TTB_BEGIN (DRAMORIG + DRAMSIZE - LCD_TTB_AREA)
64
65MEMORY 68MEMORY
66{ 69{
67 DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE 70 DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
@@ -148,7 +151,7 @@ SECTIONS
148 } > IRAM AT> FLASH 151 } > IRAM AT> FLASH
149 152
150 _iramcopy = LOADADDR(.iram); 153 _iramcopy = LOADADDR(.iram);
151 154
152 .ibss (NOLOAD) : 155 .ibss (NOLOAD) :
153 { 156 {
154 . = ALIGN(0x4); 157 . = ALIGN(0x4);
@@ -158,12 +161,12 @@ SECTIONS
158 } > IRAM 161 } > IRAM
159 162
160 /* Program stack space */ 163 /* Program stack space */
161 .pro_stack (NOLOAD): 164 .pro_stack (NOLOAD):
162 { 165 {
163 . = ALIGN(0x4); 166 . = ALIGN(0x4);
164 *(.stack) 167 *(.stack)
165 stackbegin = .; /* Variable for thread.c */ 168 stackbegin = .; /* Variable for thread.c */
166 _pro_stack_end = .; 169 _pro_stack_end = .;
167 . += PRO_STACK_SIZE; 170 . += PRO_STACK_SIZE;
168 _pro_stack_start = .; 171 _pro_stack_start = .;
169 stackend = .; /* Variable for tread.c */ 172 stackend = .; /* Variable for tread.c */
@@ -186,28 +189,45 @@ SECTIONS
186 . += FIQ_STACK_SIZE; 189 . += FIQ_STACK_SIZE;
187 _fiq_stack_start = .; 190 _fiq_stack_start = .;
188 } > IRAM 191 } > IRAM
189 192
193#ifdef MROBE_500
190 .ttbtable TTB_BEGIN (NOLOAD) : 194 .ttbtable TTB_BEGIN (NOLOAD) :
191 { 195 {
192 . = ALIGN (0x4000); 196 . = ALIGN (0x4000);
193 _ttbstart = .; 197 _ttbstart = .;
194 . += TTB_SIZE; 198 . += TTB_SIZE;
195 } > DRAM 199 } > DRAM
196 200
197 /* The LCD buffer should be at the end of memory to protect against 201 /* The LCD buffer should be at the end of memory to protect against
198 * overflowing something else when the YUV blitter is fudging the screen 202 * overflowing something else when the YUV blitter is fudging the screen
199 * size. 203 * size.
200 */ 204 */
201 205
202 .lcdbuffer (NOLOAD) : 206 .lcdbuffer (NOLOAD) :
203 { 207 {
204 _lcdbuf = .; 208 _lcdbuf = .;
205 . += LCD_BUFFER_SIZE; 209 . += LCD_BUFFER_SIZE;
206 } > DRAM 210 } > DRAM
207 211
208 .lcdbuffer2 (NOLOAD) : 212 .lcdbuffer2 (NOLOAD) :
209 { 213 {
210 _lcdbuf2 = .; 214 _lcdbuf2 = .;
211 . += LCD_BUFFER_SIZE; 215 . += LCD_BUFFER_SIZE;
212 } > DRAM 216 } > DRAM
217#else
218 .lcdbuffer LCD_BEGIN (NOLOAD) :
219 {
220 . = ALIGN(32);
221 _lcdbuf = .;
222 . += LCD_BUFFER_SIZE;
223 } > DRAM
224
225 /* Place TTB at the end of RAM to minimize alignment losses */
226 .ttbtable (NOLOAD) :
227 {
228 . = ALIGN (0x4000);
229 _ttbstart = .;
230 . += TTB_SIZE;
231 } > DRAM
232#endif
213} 233}