Enable nocache sections using the linker. PP5022/4 must use SW_CORELOCK now with shared variables in DRAM (it seems swp(b) is at least partially broken on all PP or I'm doing something very wrong here :\). For core-shared data use SHAREDBSS/DATA_ATTR. NOCACHEBSS/DATA_ATTR is available whether or not single core is forced for static peripheral-DMA buffer allocation without use of the UNCACHED_ADDR macro in code and is likely useful on a non-PP target with a data cache (although not actually enabled in config.h and the .lds's in this commit).

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16981 a1c6a512-1295-4272-9138-f99709370657

5 files changed, 52 insertions, 14 deletions

diff --git a/firmware/target/arm/sandisk/app.lds b/firmware/target/arm/sandisk/app.lds
index 765a5f0389..54af494d72 100644
--- a/firmware/target/arm/sandisk/app.lds
+++ b/firmware/target/arm/sandisk/app.lds
@@ -21,6 +21,14 @@ INPUT(target/arm/crt0-pp.o)
 #define IRAMORIG 0x40000000
 #define IRAMSIZE 0xc000
 
+#ifdef CPU_PP502x
+#define NOCACHE_BASE    0x10000000
+#else
+#define NOCACHE_BASE    0x28000000
+#endif
+
+#define CACHEALIGN_SIZE 16
+
 /* End of the audio buffer, where the codec buffer starts */
 #define ENDAUDIOADDR  (DRAMORIG + DRAMSIZE)
 
@@ -70,6 +78,18 @@ SECTIONS
         _dataend  = .;
     } > DRAM
 
+#if NOCACHE_BASE != 0
+    /* .ncdata section is placed at uncached physical alias address and is
+     * loaded at the proper cached virtual address - no copying is
+     * performed in the init code */
+    .ncdata . + NOCACHE_BASE :
+    {
+        . = ALIGN(CACHEALIGN_SIZE);
+        *(.ncdata*)
+        . = ALIGN(CACHEALIGN_SIZE);
+    } AT> DRAM
+#endif
+    
     /DISCARD/ :
     {
         *(.eh_frame)
@@ -103,7 +123,7 @@ SECTIONS
         _iend = .;
     } > IRAM
 
-    .idle_stacks :
+    .idle_stacks (NOLOAD) :
     {
        *(.idle_stacks)
 #if NUM_CORES > 1
@@ -116,7 +136,7 @@ SECTIONS
        cop_idlestackend = .;
     } > IRAM
 
-    .stack :
+    .stack (NOLOAD) :
     {
        *(.stack)
        stackbegin = .;
@@ -124,37 +144,53 @@ SECTIONS
        stackend = .;
     } > IRAM
 
-    .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram) + SIZEOF(.vectors):
+    /* .bss and .ncbss are treated as a single section to use one init loop to
+     * zero it - note "_edata" and "_end" */
+    .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.ncdata) +\
+         SIZEOF(.iram) + SIZEOF(.vectors) (NOLOAD) :
     {
        _edata = .;
         *(.bss*)
         *(COMMON)
         . = ALIGN(0x4);
-       _end = .;
     } > DRAM
 
-    .audiobuf ALIGN(4) :
+#if NOCACHE_BASE != 0
+    .ncbss . + NOCACHE_BASE (NOLOAD):
+    {
+        . = ALIGN(CACHEALIGN_SIZE);
+        *(.ncbss*)
+        . = ALIGN(CACHEALIGN_SIZE);
+    } AT> DRAM
+#endif
+
+    /* This will be aligned by preceding alignments */
+    .endaddr . - NOCACHE_BASE (NOLOAD) :
+    {
+        _end = .;
+    } > DRAM
+
+    .audiobuf (NOLOAD) :
     {
         _audiobuffer = .;
         audiobuffer = .;
     } > DRAM
-
-    .audiobufend ENDAUDIOADDR:
+    
+    .audiobufend ENDAUDIOADDR (NOLOAD) :
     {
         audiobufend = .;
         _audiobufend = .;
     } > DRAM
 
-    .codec ENDAUDIOADDR:
+    .codec ENDAUDIOADDR (NOLOAD) :
     {
         codecbuf = .;
         _codecbuf = .;
     }
 
-    .plugin ENDADDR:
+    .plugin ENDADDR (NOLOAD) :
     {
         _pluginbuf = .;
         pluginbuf = .;
     }
 }
-
diff --git a/firmware/target/arm/sandisk/ata-c200_e200.c b/firmware/target/arm/sandisk/ata-c200_e200.c
index 747cb17ca1..e4a5388978 100644
--- a/firmware/target/arm/sandisk/ata-c200_e200.c
+++ b/firmware/target/arm/sandisk/ata-c200_e200.c
@@ -165,7 +165,7 @@ static struct sd_card_status sd_status[NUM_VOLUMES] =
 /* Shoot for around 75% usage */
 static long sd_stack [(DEFAULT_STACK_SIZE*2 + 0x1c0)/sizeof(long)];
 static const char         sd_thread_name[] = "ata/sd";
-static struct mutex       sd_mtx NOCACHEBSS_ATTR;
+static struct mutex       sd_mtx SHAREDBSS_ATTR;
 static struct event_queue sd_queue;
 
 /* Posted when card plugged status has changed */
diff --git a/firmware/target/arm/sandisk/boot.lds b/firmware/target/arm/sandisk/boot.lds
index a087a7250d..1c1066895f 100644
--- a/firmware/target/arm/sandisk/boot.lds
+++ b/firmware/target/arm/sandisk/boot.lds
@@ -30,6 +30,7 @@ SECTIONS
     *(.irodata)
     *(.idata)
     *(.data*)
+    *(.ncdata*)
     _dataend = . ;
    }
 
@@ -51,6 +52,7 @@ SECTIONS
      _edata = .;
      *(.bss*);
      *(.ibss);
+     *(.ncbss*);
      _end = .;
    }
 }
diff --git a/firmware/target/arm/sandisk/sansa-c200/lcd-c200.c b/firmware/target/arm/sandisk/sansa-c200/lcd-c200.c
index a629739d50..a2110f7e66 100644
--- a/firmware/target/arm/sandisk/sansa-c200/lcd-c200.c
+++ b/firmware/target/arm/sandisk/sansa-c200/lcd-c200.c
@@ -23,7 +23,7 @@
 #include "system.h"
 
 /* Display status */
-static unsigned lcd_yuv_options NOCACHEBSS_ATTR = 0;
+static unsigned lcd_yuv_options SHAREDBSS_ATTR = 0;
 
 /* LCD command set for Samsung S6B33B2 */
 
diff --git a/firmware/target/arm/sandisk/sansa-e200/lcd-e200.c b/firmware/target/arm/sandisk/sansa-e200/lcd-e200.c
index f2689eabbf..15263b5533 100644
--- a/firmware/target/arm/sandisk/sansa-e200/lcd-e200.c
+++ b/firmware/target/arm/sandisk/sansa-e200/lcd-e200.c
@@ -28,8 +28,8 @@
 
 /* Power and display status */
 static bool power_on   = false; /* Is the power turned on?   */
-static bool display_on NOCACHEBSS_ATTR = false; /* Is the display turned on? */
-static unsigned lcd_yuv_options NOCACHEBSS_ATTR = 0;
+static bool display_on SHAREDBSS_ATTR = false; /* Is the display turned on? */
+static unsigned lcd_yuv_options SHAREDBSS_ATTR = 0;
 
 /* Reverse Flag */
 #define R_DISP_CONTROL_NORMAL 0x0004