summaryrefslogtreecommitdiff
path: root/firmware/target/arm/s5l8702
diff options
context:
space:
mode:
authorCástor Muñoz <cmvidal@gmail.com>2014-12-09 19:38:47 +0100
committerCástor Muñoz <cmvidal@gmail.com>2015-10-07 06:15:04 +0200
commit32b455851103dea48444243352efdfd693cd3b6b (patch)
tree1ed51f6de27e6bc993f2d13607471cdf2c791a22 /firmware/target/arm/s5l8702
parentbe5fc0ff7f01ad2e5b964ca437674c15a7a8bd71 (diff)
downloadrockbox-32b455851103dea48444243352efdfd693cd3b6b.tar.gz
rockbox-32b455851103dea48444243352efdfd693cd3b6b.zip
iPod Classic: initialize USB power configuration
This patch limits the drawn USB current to 100/500mA, instead of the actual 200/1000mA settings. It also initializes other USB power related GPIOs. Solves some USB disconnect issues: FS#12990, FS#12956. I am using a powered USB HUB with no problems (Vusb=5.05V unloaded), but there are lots of USB disconnects when using the motherboard USB ports (Vusb=4.91V), this patch solves all my issues. Actually, it seems that the USB current drain is limited to 1000mA, when a load peak occurs most USB2 ports deliver more than 500mA, as current consumption increases the USB voltage decreases, an excesive voltage drop produces USB disconnections. Limiting USB current drain to 500mA also limits the voltage drop, preventing subsequent USB failures. Anyway, to minimize voltage drop, it is recommended to use quality cables and preferably connect to USB ports with higher Vusb. Change-Id: I1b931aa18ec93bfd1214e475a72e42893eff52f6
Diffstat (limited to 'firmware/target/arm/s5l8702')
-rw-r--r--firmware/target/arm/s5l8702/ipod6g/power-ipod6g.c38
1 files changed, 38 insertions, 0 deletions
diff --git a/firmware/target/arm/s5l8702/ipod6g/power-ipod6g.c b/firmware/target/arm/s5l8702/ipod6g/power-ipod6g.c
index 2e0fe87883..50e91b616e 100644
--- a/firmware/target/arm/s5l8702/ipod6g/power-ipod6g.c
+++ b/firmware/target/arm/s5l8702/ipod6g/power-ipod6g.c
@@ -43,6 +43,44 @@ void power_init(void)
43 43
44 /* DOWN1CTL: CPU DVM step time = 30us (default: no DVM) */ 44 /* DOWN1CTL: CPU DVM step time = 30us (default: no DVM) */
45 pmu_write(0x20, 2); 45 pmu_write(0x20, 2);
46
47 /* USB power configuration:
48 *
49 * GPIO C0 is probably related to the LTC4066's CLPROG
50 * pin (see datasheet). Setting it high allows to double
51 * the maximum current selected by HPWR:
52 *
53 * GPIO B6 GPIO C0 USB current
54 * HPWR CLPROG ??? limit (mA)
55 * ------- ---------- -----------
56 * 0 0 100
57 * 1 0 500
58 * 0 1 200
59 * 1 1 1000 ??? (max.seen ~750mA)
60 *
61 * USB current limit includes battery charge and device
62 * consumption. Battery charge has it's own limit at
63 * 330~340 mA (configured using RPROG).
64 *
65 * Setting either of GPIO C1 or GPIO C2 disables battery
66 * charge, power needed for device consumptiom is drained
67 * from USB or AC adaptor when present. If external power
68 * is not present or it is insufficient or limited,
69 * additional required power is drained from battery.
70 */
71 PCONB = (PCONB & 0x000000ff)
72 | (0xe << 8) /* route D+ to ADC2: off */
73 | (0xe << 12) /* route D- to ADC2: off */
74 | (0x0 << 16) /* USB related input, POL pin ??? */
75 | (0x0 << 20) /* USB related input, !CHRG pin ??? */
76 | (0xe << 24) /* HPWR: 100mA */
77 | (0xe << 28); /* USB suspend: off */
78
79 PCONC = (PCONC & 0xffff0000)
80 | (0xe << 0) /* double HPWR limit: off */
81 | (0xe << 4) /* disable battery charge: off */
82 | (0xe << 8) /* disable battery charge: off */
83 | (0x0 << 12); /* USB inserted/not inserted */
46} 84}
47 85
48void ide_power_enable(bool on) 86void ide_power_enable(bool on)