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authorCástor Muñoz <cmvidal@gmail.com>2016-02-04 22:49:01 +0100
committerCástor Muñoz <cmvidal@gmail.com>2016-05-25 10:59:31 +0200
commit1aefd9ea4146ebb7eee606be4efb5cf22654b082 (patch)
treeffbe9f88c2e0624faf93419c5bc9bd63963766ec /firmware/target/arm/s5l8702/ipod6g/pmu-target.h
parentc31fcddd985a9855ece85f4209a4bdae77f3f9c8 (diff)
downloadrockbox-1aefd9ea4146ebb7eee606be4efb5cf22654b082.tar.gz
rockbox-1aefd9ea4146ebb7eee606be4efb5cf22654b082.zip
iPod Classic: HW preliminary initialization for bootloader
When the bootloader starts, most of HW never has been initialized. This patch includes all code needed to perform the preliminary initialization on SYSCON, GPIO, i2c, and MIU. The code is based on emCORE and OF reverse engineering, ported to C for readability. Change-Id: I9ecf2c3e8b1b636241a211dbba8735137accd05c
Diffstat (limited to 'firmware/target/arm/s5l8702/ipod6g/pmu-target.h')
-rw-r--r--firmware/target/arm/s5l8702/ipod6g/pmu-target.h9
1 files changed, 5 insertions, 4 deletions
diff --git a/firmware/target/arm/s5l8702/ipod6g/pmu-target.h b/firmware/target/arm/s5l8702/ipod6g/pmu-target.h
index 3a90ad8789..e4bef6f47c 100644
--- a/firmware/target/arm/s5l8702/ipod6g/pmu-target.h
+++ b/firmware/target/arm/s5l8702/ipod6g/pmu-target.h
@@ -40,8 +40,8 @@
40#define LDO_UNK5 5 /* TBC: nano3g NAND */ 40#define LDO_UNK5 5 /* TBC: nano3g NAND */
41#define LDO_CWHEEL 6 41#define LDO_CWHEEL 6
42#define LDO_ACCY 7 /* HCLDO */ 42#define LDO_ACCY 7 /* HCLDO */
43 43/*
44/* Other LDOs: 44 * Other LDOs:
45 * AUTOLDO: Hard Disk 45 * AUTOLDO: Hard Disk
46 * DOWN1: CPU 46 * DOWN1: CPU
47 * DOWN2: SDRAM 47 * DOWN2: SDRAM
@@ -50,9 +50,9 @@
50 * EXTON inputs: 50 * EXTON inputs:
51 * EXTON1: button/holdswitch related (TBC) 51 * EXTON1: button/holdswitch related (TBC)
52 * EXTON2: USB Vbus (High when present) 52 * EXTON2: USB Vbus (High when present)
53 * EXTON3: ACCESORY (Low when present) 53 * EXTON3: ACCESSORY (Low when present)
54 * 54 *
55 * GPIO: 55 * PMU GPIO:
56 * GPIO1: input, Mikey (jack remote ctrl) interrupt (TBC) 56 * GPIO1: input, Mikey (jack remote ctrl) interrupt (TBC)
57 * GPIO2: input, hold switch (TBC) 57 * GPIO2: input, hold switch (TBC)
58 * GPIO3: output, unknown 58 * GPIO3: output, unknown
@@ -82,6 +82,7 @@ unsigned char pmu_rd(int address);
82int pmu_wr(int address, unsigned char val); 82int pmu_wr(int address, unsigned char val);
83int pmu_rd_multiple(int address, int count, unsigned char* buffer); 83int pmu_rd_multiple(int address, int count, unsigned char* buffer);
84int pmu_wr_multiple(int address, int count, unsigned char* buffer); 84int pmu_wr_multiple(int address, int count, unsigned char* buffer);
85void pmu_preinit(void);
85#endif 86#endif
86 87
87#endif /* __PMU_TARGET_H__ */ 88#endif /* __PMU_TARGET_H__ */