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authorCástor Muñoz <cmvidal@gmail.com>2016-02-04 22:49:01 +0100
committerCástor Muñoz <cmvidal@gmail.com>2016-05-25 10:59:31 +0200
commit1aefd9ea4146ebb7eee606be4efb5cf22654b082 (patch)
treeffbe9f88c2e0624faf93419c5bc9bd63963766ec /firmware/target/arm/s5l8702/ipod6g/pmu-ipod6g.c
parentc31fcddd985a9855ece85f4209a4bdae77f3f9c8 (diff)
downloadrockbox-1aefd9ea4146ebb7eee606be4efb5cf22654b082.tar.gz
rockbox-1aefd9ea4146ebb7eee606be4efb5cf22654b082.zip
iPod Classic: HW preliminary initialization for bootloader
When the bootloader starts, most of HW never has been initialized. This patch includes all code needed to perform the preliminary initialization on SYSCON, GPIO, i2c, and MIU. The code is based on emCORE and OF reverse engineering, ported to C for readability. Change-Id: I9ecf2c3e8b1b636241a211dbba8735137accd05c
Diffstat (limited to 'firmware/target/arm/s5l8702/ipod6g/pmu-ipod6g.c')
-rw-r--r--firmware/target/arm/s5l8702/ipod6g/pmu-ipod6g.c109
1 files changed, 109 insertions, 0 deletions
diff --git a/firmware/target/arm/s5l8702/ipod6g/pmu-ipod6g.c b/firmware/target/arm/s5l8702/ipod6g/pmu-ipod6g.c
index 2a9236046c..9c3ec8e711 100644
--- a/firmware/target/arm/s5l8702/ipod6g/pmu-ipod6g.c
+++ b/firmware/target/arm/s5l8702/ipod6g/pmu-ipod6g.c
@@ -165,4 +165,113 @@ int pmu_wr(int address, unsigned char val)
165{ 165{
166 return pmu_wr_multiple(address, 1, &val); 166 return pmu_wr_multiple(address, 1, &val);
167} 167}
168
169void pmu_preinit(void)
170{
171 static const char init_data[] =
172 {
173 /* reset OOC shutdown register */
174 PCF5063X_REG_OOCSHDWN, 0x0,
175
176 /* LDO_UNK1: 3000 mV, enabled */
177 PCF5063X_REG_LDO1OUT, 0x15,
178 PCF5063X_REG_LDO1ENA, 0x1,
179
180 /* LDO_UNK2: 3000 mV, enabled */
181 PCF5063X_REG_LDO2OUT, 0x15,
182 PCF5063X_REG_LDO2ENA, 0x1,
183
184 /* LDO_LCD: 3000 mV, enabled */
185 PCF5063X_REG_LDO3OUT, 0x15,
186 PCF5063X_REG_LDO3ENA, 0x1,
187
188 /* LDO_CODEC: 1800 mV, enabled */
189 PCF5063X_REG_LDO4OUT, 0x9,
190 PCF5063X_REG_LDO4ENA, 0x1,
191
192 /* LDO_UNK5: 3000 mV, disabled */
193 PCF5063X_REG_LDO5OUT, 0x15,
194 PCF5063X_REG_LDO5ENA, 0x0,
195
196 /* LDO_CWHEEL: 3000 mV, ON when GPIO2 High */
197 PCF5063X_REG_LDO6OUT, 0x15,
198 PCF5063X_REG_LDO6ENA, 0x4,
199
200 /* LDO_ACCY: 3300 mV, disabled */
201 PCF5063X_REG_HCLDOOUT, 0x18,
202 PCF5063X_REG_HCLDOENA, 0x0,
203
204 /* LDO_CWHEEL is ON in STANDBY state,
205 LDO_CWHEEL and MEMLDO are ON in UNKNOWN state (TBC) */
206 PCF5063X_REG_STBYCTL1, 0x0,
207 PCF5063X_REG_STBYCTL2, 0x8c,
208
209 /* GPIO1,2 = input, GPIO3 = output */
210 PCF5063X_REG_GPIOCTL, 0x3,
211 PCF5063X_REG_GPIO1CFG, 0x0,
212 PCF5063X_REG_GPIO2CFG, 0x0,
213
214 /* DOWN2 converter (SDRAM): 1800 mV, enabled,
215 startup current limit = 15mA*0x10 (TBC) */
216 PCF5063X_REG_DOWN2OUT, 0x2f,
217 PCF5063X_REG_DOWN2ENA, 0x1,
218 PCF5063X_REG_DOWN2CTL, 0x0,
219 PCF5063X_REG_DOWN2MXC, 0x10,
220
221 /* MEMLDO: 1800 mV, enabled */
222 PCF5063X_REG_MEMLDOOUT, 0x9,
223 PCF5063X_REG_MEMLDOENA, 0x1,
224
225 /* AUTOLDO (HDD): 3400 mV, disabled,
226 limit = 1000 mA (40mA*0x19), limit always active */
227 PCF5063X_REG_AUTOOUT, 0x6f,
228 PCF5063X_REG_AUTOENA, 0x0,
229 PCF5063X_REG_AUTOCTL, 0x0,
230 PCF5063X_REG_AUTOMXC, 0x59,
231
232 /* Vsysok = 3100 mV */
233 PCF5063X_REG_SVMCTL, 0x8,
234
235 /* Reserved */
236 0x58, 0x0,
237
238 /* Mask all PMU interrupts */
239 PCF5063X_REG_INT1M, 0xff,
240 PCF5063X_REG_INT2M, 0xff,
241 PCF5063X_REG_INT3M, 0xff,
242 PCF5063X_REG_INT4M, 0xff,
243 PCF5063X_REG_INT5M, 0xff,
244 PCF50635_REG_INT6M, 0xff,
245
246 /* Wakeup on rising edge for EXTON1 and EXTON2,
247 wakeup on falling edge for EXTON3 and !ONKEY,
248 wakeup on RTC alarm, wakeup on adapter insert,
249 Vbat status has no effect in state machine */
250 PCF5063X_REG_OOCWAKE, 0xdf,
251 PCF5063X_REG_OOCTIM1, 0xaa,
252 PCF5063X_REG_OOCTIM2, 0x4a,
253 PCF5063X_REG_OOCMODE, 0x5,
254 PCF5063X_REG_OOCCTL, 0x27,
255
256 /* GPO selection = LED external NFET drive signal */
257 PCF5063X_REG_GPOCFG, 0x1,
258 /* LED converter OFF, overvoltage protection enabled,
259 OCP limit is 500 mA, led_dimstep = 16*0x6/32768 */
260 PCF5063X_REG_LEDENA, 0x0,
261 PCF5063X_REG_LEDCTL, 0x5,
262 PCF5063X_REG_LEDDIM, 0x6,
263
264 /* end marker */
265 0
266 };
267
268 const char* ptr;
269 for (ptr = init_data; *ptr != 0; ptr += 2)
270 pmu_wr(ptr[0], ptr[1]);
271
272 /* clear PMU interrupts */
273 unsigned char rd_buf[5];
274 pmu_rd_multiple(PCF5063X_REG_INT1, 5, rd_buf);
275 pmu_rd(PCF50635_REG_INT6);
276}
168#endif /* BOOTLOADER */ 277#endif /* BOOTLOADER */