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authorCástor Muñoz <cmvidal@gmail.com>2016-05-12 02:14:48 +0200
committerCástor Muñoz <cmvidal@gmail.com>2016-05-13 23:23:01 +0200
commit5017523a6b1ea9d230d8b8cf801ad3adbe7f43f5 (patch)
treedb521d53b171dde30f8b083177bb3c322cd43cf6 /firmware/target/arm/s5l8700/system-s5l8700.c
parent8fb67f48ab57770c3233352de17846a8a773192a (diff)
downloadrockbox-5017523a6b1ea9d230d8b8cf801ad3adbe7f43f5.tar.gz
rockbox-5017523a6b1ea9d230d8b8cf801ad3adbe7f43f5.zip
Add UART suuport for s5l8700 and s5l8701
Add UART support for s5l8700/1 using the UC870X UART controller, actually the functionallity is disabled and must be enabled for each individual target. Tested on iPod Nano 2G (s5l8701), not tested on s5l8700. Change-Id: Ic0f216bb871502d355a70e4b658e536a2c0976a9
Diffstat (limited to 'firmware/target/arm/s5l8700/system-s5l8700.c')
-rw-r--r--firmware/target/arm/s5l8700/system-s5l8700.c29
1 files changed, 17 insertions, 12 deletions
diff --git a/firmware/target/arm/s5l8700/system-s5l8700.c b/firmware/target/arm/s5l8700/system-s5l8700.c
index 601955fbac..728fea0432 100644
--- a/firmware/target/arm/s5l8700/system-s5l8700.c
+++ b/firmware/target/arm/s5l8700/system-s5l8700.c
@@ -27,6 +27,7 @@
27#include "storage.h" 27#include "storage.h"
28#include "pmu-target.h" 28#include "pmu-target.h"
29#endif 29#endif
30#include "uart-target.h"
30 31
31/* MIUSDPARA_BOOST taken from OF (see crt0.S). MIUSDPARA_UNBOOST is derived 32/* MIUSDPARA_BOOST taken from OF (see crt0.S). MIUSDPARA_UNBOOST is derived
32 * from MIUSDPARA_BOOST due to the fact that the minimum allowed DRAM timings 33 * from MIUSDPARA_BOOST due to the fact that the minimum allowed DRAM timings
@@ -63,7 +64,7 @@ default_interrupt(INT_DMA);
63default_interrupt(INT_ALARM_RTC); 64default_interrupt(INT_ALARM_RTC);
64default_interrupt(INT_PRI_RTC); 65default_interrupt(INT_PRI_RTC);
65default_interrupt(RESERVED1); 66default_interrupt(RESERVED1);
66default_interrupt(INT_UART); 67default_interrupt(INT_UART1);
67default_interrupt(INT_USB_HOST); 68default_interrupt(INT_USB_HOST);
68default_interrupt(INT_USB_FUNC); 69default_interrupt(INT_USB_FUNC);
69default_interrupt(INT_LCDC_0); 70default_interrupt(INT_LCDC_0);
@@ -81,9 +82,10 @@ default_interrupt(RESERVED2);
81default_interrupt(INT_MSTICK); 82default_interrupt(INT_MSTICK);
82default_interrupt(INT_ADC_WAKEUP); 83default_interrupt(INT_ADC_WAKEUP);
83default_interrupt(INT_ADC); 84default_interrupt(INT_ADC);
84default_interrupt(INT_UNK1); 85#if CONFIG_CPU==S5L8701
85default_interrupt(INT_UNK2); 86default_interrupt(INT_UNK);
86default_interrupt(INT_UNK3); 87default_interrupt(INT_UART2);
88#endif
87 89
88 90
89void INT_TIMER(void) 91void INT_TIMER(void)
@@ -98,16 +100,16 @@ void INT_TIMER(void)
98#if CONFIG_CPU==S5L8701 100#if CONFIG_CPU==S5L8701
99static void (* const irqvector[])(void) = 101static void (* const irqvector[])(void) =
100{ /* still 90% unverified and probably incorrect */ 102{ /* still 90% unverified and probably incorrect */
101 EXT0,EXT1,EXT2,EINT_VBUS,EINTG,INT_TIMER,INT_WDT,INT_UNK1, 103 EXT0,EXT1,EXT2,EINT_VBUS,EINTG,INT_TIMER,INT_WDT,INT_UART2,
102 INT_UNK2,INT_UNK3,INT_DMA,INT_ALARM_RTC,INT_PRI_RTC,RESERVED1,INT_UART,INT_USB_HOST, 104 INT_UNK,INT_UNK,INT_DMA,INT_ALARM_RTC,INT_UART1,INT_UNK,INT_UNK,INT_USB_HOST,
103 INT_USB_FUNC,INT_LCDC_0,INT_LCDC_1,INT_CALM,INT_ATA,INT_UART0,INT_SPDIF_OUT,INT_ECC, 105 INT_USB_FUNC,INT_LCDC_0,INT_LCDC_1,INT_CALM,INT_ATA,INT_UNK,INT_SPDIF_OUT,INT_ECC,
104 INT_SDCI,INT_LCD,INT_WHEEL,INT_IIC,RESERVED2,INT_MSTICK,INT_ADC_WAKEUP,INT_ADC 106 INT_SDCI,INT_LCD,INT_WHEEL,INT_IIC,RESERVED2,INT_MSTICK,INT_ADC_WAKEUP,INT_ADC
105}; 107};
106#else 108#else
107static void (* const irqvector[])(void) = 109static void (* const irqvector[])(void) =
108{ 110{
109 EXT0,EXT1,EXT2,EINT_VBUS,EINTG,INT_TIMERA,INT_WDT,INT_TIMERB, 111 EXT0,EXT1,EXT2,EINT_VBUS,EINTG,INT_TIMERA,INT_WDT,INT_TIMERB,
110 INT_TIMERC,INT_TIMERD,INT_DMA,INT_ALARM_RTC,INT_PRI_RTC,RESERVED1,INT_UART,INT_USB_HOST, 112 INT_TIMERC,INT_TIMERD,INT_DMA,INT_ALARM_RTC,INT_PRI_RTC,RESERVED1,INT_UART1,INT_USB_HOST,
111 INT_USB_FUNC,INT_LCDC_0,INT_LCDC_1,INT_ECC,INT_CALM,INT_ATA,INT_UART0,INT_SPDIF_OUT, 113 INT_USB_FUNC,INT_LCDC_0,INT_LCDC_1,INT_ECC,INT_CALM,INT_ATA,INT_UART0,INT_SPDIF_OUT,
112 INT_SDCI,INT_LCD,INT_WHEEL,INT_IIC,RESERVED2,INT_MSTICK,INT_ADC_WAKEUP,INT_ADC 114 INT_SDCI,INT_LCD,INT_WHEEL,INT_IIC,RESERVED2,INT_MSTICK,INT_ADC_WAKEUP,INT_ADC
113}; 115};
@@ -116,16 +118,16 @@ static void (* const irqvector[])(void) =
116#if CONFIG_CPU==S5L8701 118#if CONFIG_CPU==S5L8701
117static const char * const irqname[] = 119static const char * const irqname[] =
118{ /* still 90% unverified and probably incorrect */ 120{ /* still 90% unverified and probably incorrect */
119 "EXT0","EXT1","EXT2","EINT_VBUS","EINTG","INT_TIMER","INT_WDT","INT_UNK1", 121 "EXT0","EXT1","EXT2","EINT_VBUS","EINTG","INT_TIMER","INT_WDT","INT_UART2",
120 "INT_UNK2","INT_UNK3","INT_DMA","INT_ALARM_RTC","INT_PRI_RTC","Reserved","INT_UART","INT_USB_HOST", 122 "INT_UNK1","INT_UNK2","INT_DMA","INT_ALARM_RTC","INT_UART1","INT_UNK3","INT_UNK4","INT_USB_HOST",
121 "INT_USB_FUNC","INT_LCDC_0","INT_LCDC_1","INT_CALM","INT_ATA","INT_UART0","INT_SPDIF_OUT","INT_ECC", 123 "INT_USB_FUNC","INT_LCDC_0","INT_LCDC_1","INT_CALM","INT_ATA","INT_UNK5","INT_SPDIF_OUT","INT_ECC",
122 "INT_SDCI","INT_LCD","INT_WHEEL","INT_IIC","Reserved","INT_MSTICK","INT_ADC_WAKEUP","INT_ADC" 124 "INT_SDCI","INT_LCD","INT_WHEEL","INT_IIC","Reserved","INT_MSTICK","INT_ADC_WAKEUP","INT_ADC"
123}; 125};
124#else 126#else
125static const char * const irqname[] = 127static const char * const irqname[] =
126{ 128{
127 "EXT0","EXT1","EXT2","EINT_VBUS","EINTG","INT_TIMERA","INT_WDT","INT_TIMERB", 129 "EXT0","EXT1","EXT2","EINT_VBUS","EINTG","INT_TIMERA","INT_WDT","INT_TIMERB",
128 "INT_TIMERC","INT_TIMERD","INT_DMA","INT_ALARM_RTC","INT_PRI_RTC","Reserved","INT_UART","INT_USB_HOST", 130 "INT_TIMERC","INT_TIMERD","INT_DMA","INT_ALARM_RTC","INT_PRI_RTC","Reserved","INT_UART1","INT_USB_HOST",
129 "INT_USB_FUNC","INT_LCDC_0","INT_LCDC_1","INT_ECC","INT_CALM","INT_ATA","INT_UART0","INT_SPDIF_OUT", 131 "INT_USB_FUNC","INT_LCDC_0","INT_LCDC_1","INT_ECC","INT_CALM","INT_ATA","INT_UART0","INT_SPDIF_OUT",
130 "INT_SDCI","INT_LCD","INT_WHEEL","INT_IIC","Reserved","INT_MSTICK","INT_ADC_WAKEUP","INT_ADC" 132 "INT_SDCI","INT_LCD","INT_WHEEL","INT_IIC","Reserved","INT_MSTICK","INT_ADC_WAKEUP","INT_ADC"
131}; 133};
@@ -172,6 +174,9 @@ void system_init(void)
172#ifdef IPOD_NANO2G 174#ifdef IPOD_NANO2G
173 pmu_init(); 175 pmu_init();
174#endif 176#endif
177#ifdef HAVE_SERIAL
178 uart_init();
179#endif
175} 180}
176 181
177void system_reboot(void) 182void system_reboot(void)