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author | Bertrik Sikken <bertrik@sikken.nl> | 2009-10-25 13:52:46 +0000 |
---|---|---|
committer | Bertrik Sikken <bertrik@sikken.nl> | 2009-10-25 13:52:46 +0000 |
commit | d2827996af26dc668eef5a9212285d2b781279bd (patch) | |
tree | 34f3b5ac76da3165c42d138c53f4978d67b95a18 /firmware/target/arm/s5l8700/meizu-m6sp/lcd-m6sp.c | |
parent | 6290f78177b2860df0beaa63d11cb5f8528b77ab (diff) | |
download | rockbox-d2827996af26dc668eef5a9212285d2b781279bd.tar.gz rockbox-d2827996af26dc668eef5a9212285d2b781279bd.zip |
Meizu M6 SP: make bootloader compile and run again
* don't use DRAM yet in the bootloader linker script
* add header files for the ftl and nand
* update svn:keywords
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23347 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/s5l8700/meizu-m6sp/lcd-m6sp.c')
-rw-r--r-- | firmware/target/arm/s5l8700/meizu-m6sp/lcd-m6sp.c | 736 |
1 files changed, 368 insertions, 368 deletions
diff --git a/firmware/target/arm/s5l8700/meizu-m6sp/lcd-m6sp.c b/firmware/target/arm/s5l8700/meizu-m6sp/lcd-m6sp.c index 9a24480bfa..fa3d5aa7f2 100644 --- a/firmware/target/arm/s5l8700/meizu-m6sp/lcd-m6sp.c +++ b/firmware/target/arm/s5l8700/meizu-m6sp/lcd-m6sp.c | |||
@@ -19,12 +19,12 @@ | |||
19 | * | 19 | * |
20 | ****************************************************************************/ | 20 | ****************************************************************************/ |
21 | 21 | ||
22 | #include <inttypes.h> | 22 | #include <inttypes.h> |
23 | 23 | ||
24 | #include "config.h" | 24 | #include "config.h" |
25 | #include "s5l8700.h" | 25 | #include "s5l8700.h" |
26 | #include "lcd.h" | 26 | #include "lcd.h" |
27 | 27 | ||
28 | /* LCD driver for the Meizu M6 SP using the CLCD controller in the S5L8700 | 28 | /* LCD driver for the Meizu M6 SP using the CLCD controller in the S5L8700 |
29 | 29 | ||
30 | The Meizu M6 SP can have two different LCDs, the S6D0139 and another | 30 | The Meizu M6 SP can have two different LCDs, the S6D0139 and another |
@@ -40,10 +40,10 @@ | |||
40 | 40 | ||
41 | */ | 41 | */ |
42 | 42 | ||
43 | /* LCD SPI connections */ | 43 | /* LCD SPI connections */ |
44 | #define LCD_SPI_SSn (1<<1) /* on PDAT7 */ | 44 | #define LCD_SPI_SSn (1<<1) /* on PDAT7 */ |
45 | #define LCD_SPI_MISO (1<<2) /* on PDAT3 */ | 45 | #define LCD_SPI_MISO (1<<2) /* on PDAT3 */ |
46 | #define LCD_SPI_MOSI (1<<6) /* on PDAT3 */ | 46 | #define LCD_SPI_MOSI (1<<6) /* on PDAT3 */ |
47 | #define LCD_SPI_SCLK (1<<7) /* on PDAT3 */ | 47 | #define LCD_SPI_SCLK (1<<7) /* on PDAT3 */ |
48 | 48 | ||
49 | /* LCD SPI communication definitions */ | 49 | /* LCD SPI communication definitions */ |
@@ -51,317 +51,317 @@ | |||
51 | #define LCD_SPI_INDEX_WRITE (LCD_SPI_DEVICE_ID|0) | 51 | #define LCD_SPI_INDEX_WRITE (LCD_SPI_DEVICE_ID|0) |
52 | #define LCD_SPI_STATUS_READ (LCD_SPI_DEVICE_ID|1) | 52 | #define LCD_SPI_STATUS_READ (LCD_SPI_DEVICE_ID|1) |
53 | #define LCD_SPI_DATA_WRITE (LCD_SPI_DEVICE_ID|2) | 53 | #define LCD_SPI_DATA_WRITE (LCD_SPI_DEVICE_ID|2) |
54 | #define LCD_SPI_DATA_READ (LCD_SPI_DEVICE_ID|3) | 54 | #define LCD_SPI_DATA_READ (LCD_SPI_DEVICE_ID|3) |
55 | 55 | ||
56 | #define LCD_TYPE1_ID 0x139 /* id for LCD type S6D0139 */ | 56 | #define LCD_TYPE1_ID 0x139 /* id for LCD type S6D0139 */ |
57 | 57 | ||
58 | static int lcd_type = 0; | 58 | static int lcd_type = 0; |
59 | 59 | ||
60 | /* simple and crude delay */ | 60 | /* simple and crude delay */ |
61 | static void lcd_delay(int count) | 61 | static void lcd_delay(int count) |
62 | { | 62 | { |
63 | volatile int i; | 63 | volatile int i; |
64 | for (i = 0; i < count; i++); | 64 | for (i = 0; i < count; i++); |
65 | } | 65 | } |
66 | 66 | ||
67 | /* write 'data_out' of length 'bits' over SPI and return received data */ | 67 | /* write 'data_out' of length 'bits' over SPI and return received data */ |
68 | static unsigned int lcd_spi_transfer(int bits, unsigned int data_out) | 68 | static unsigned int lcd_spi_transfer(int bits, unsigned int data_out) |
69 | { | 69 | { |
70 | unsigned int data_in = 0; | 70 | unsigned int data_in = 0; |
71 | 71 | ||
72 | /* SSn active */ | 72 | /* SSn active */ |
73 | PDAT7 &= ~LCD_SPI_SSn; | 73 | PDAT7 &= ~LCD_SPI_SSn; |
74 | lcd_delay(10); | 74 | lcd_delay(10); |
75 | 75 | ||
76 | /* send and receive data */ | 76 | /* send and receive data */ |
77 | while (bits--) { | 77 | while (bits--) { |
78 | /* CLK low */ | 78 | /* CLK low */ |
79 | PDAT3 &= ~LCD_SPI_SCLK; | 79 | PDAT3 &= ~LCD_SPI_SCLK; |
80 | 80 | ||
81 | /* set MOSI */ | 81 | /* set MOSI */ |
82 | if (data_out & (1 << bits)) { | 82 | if (data_out & (1 << bits)) { |
83 | PDAT3 |= LCD_SPI_MOSI; | 83 | PDAT3 |= LCD_SPI_MOSI; |
84 | } | 84 | } |
85 | else { | 85 | else { |
86 | PDAT3 &= ~LCD_SPI_MOSI; | 86 | PDAT3 &= ~LCD_SPI_MOSI; |
87 | } | 87 | } |
88 | 88 | ||
89 | /* delay */ | 89 | /* delay */ |
90 | lcd_delay(10); | 90 | lcd_delay(10); |
91 | 91 | ||
92 | /* sample MISO */ | 92 | /* sample MISO */ |
93 | data_in <<= 1; | 93 | data_in <<= 1; |
94 | if (PDAT3 & LCD_SPI_MISO) { | 94 | if (PDAT3 & LCD_SPI_MISO) { |
95 | data_in |= 1; | 95 | data_in |= 1; |
96 | } | 96 | } |
97 | 97 | ||
98 | /* CLK high */ | 98 | /* CLK high */ |
99 | PDAT3 |= LCD_SPI_SCLK; | 99 | PDAT3 |= LCD_SPI_SCLK; |
100 | 100 | ||
101 | /* delay */ | 101 | /* delay */ |
102 | lcd_delay(10); | 102 | lcd_delay(10); |
103 | } | 103 | } |
104 | 104 | ||
105 | /* SSn inactive */ | 105 | /* SSn inactive */ |
106 | PDAT7 |= LCD_SPI_SSn; | 106 | PDAT7 |= LCD_SPI_SSn; |
107 | lcd_delay(10); | 107 | lcd_delay(10); |
108 | 108 | ||
109 | return data_in; | 109 | return data_in; |
110 | } | 110 | } |
111 | 111 | ||
112 | /* initialize the lcd SPI port interface */ | 112 | /* initialize the lcd SPI port interface */ |
113 | static void lcd_spi_init(void) | 113 | static void lcd_spi_init(void) |
114 | { | 114 | { |
115 | /* configure SSn (P7.1) as output */ | 115 | /* configure SSn (P7.1) as output */ |
116 | PCON7 = (PCON7 & ~0x000000F0) | 0x00000010; | 116 | PCON7 = (PCON7 & ~0x000000F0) | 0x00000010; |
117 | |||
118 | /* configure MISO (P3.2) input, MOSI (P3.6) output, SCLK (P3.7) output */ | ||
119 | PCON3 = (PCON3 & ~0xFF000F00) | 0x11000000; | ||
120 | 117 | ||
121 | /* set all outputs high */ | 118 | /* configure MISO (P3.2) input, MOSI (P3.6) output, SCLK (P3.7) output */ |
122 | PDAT7 |= LCD_SPI_SSn; | 119 | PCON3 = (PCON3 & ~0xFF000F00) | 0x11000000; |
123 | PDAT3 |= (LCD_SPI_MOSI | LCD_SPI_SCLK); | 120 | |
124 | } | 121 | /* set all outputs high */ |
125 | 122 | PDAT7 |= LCD_SPI_SSn; | |
126 | /* read LCD identification word over SPI */ | 123 | PDAT3 |= (LCD_SPI_MOSI | LCD_SPI_SCLK); |
127 | static unsigned int lcd_read_reg(unsigned reg) | 124 | } |
128 | { | 125 | |
129 | unsigned int data; | 126 | /* read LCD identification word over SPI */ |
127 | static unsigned int lcd_read_reg(unsigned reg) | ||
128 | { | ||
129 | unsigned int data; | ||
130 | 130 | ||
131 | lcd_spi_transfer(24, (LCD_SPI_INDEX_WRITE << 16) | reg); | 131 | lcd_spi_transfer(24, (LCD_SPI_INDEX_WRITE << 16) | reg); |
132 | data = lcd_spi_transfer(24, (LCD_SPI_DATA_READ << 16)); | 132 | data = lcd_spi_transfer(24, (LCD_SPI_DATA_READ << 16)); |
133 | return data & 0xFFFF; | 133 | return data & 0xFFFF; |
134 | } | 134 | } |
135 | 135 | ||
136 | /* write LCD register over SPI */ | 136 | /* write LCD register over SPI */ |
137 | static void lcd_write_reg(unsigned char reg, unsigned int data) | 137 | static void lcd_write_reg(unsigned char reg, unsigned int data) |
138 | { | 138 | { |
139 | lcd_spi_transfer(24, (LCD_SPI_INDEX_WRITE << 16) | reg); | 139 | lcd_spi_transfer(24, (LCD_SPI_INDEX_WRITE << 16) | reg); |
140 | lcd_spi_transfer(24, (LCD_SPI_DATA_WRITE << 16) | data); | 140 | lcd_spi_transfer(24, (LCD_SPI_DATA_WRITE << 16) | data); |
141 | } | 141 | } |
142 | 142 | ||
143 | /* enable/disable clock signals towards the lcd */ | 143 | /* enable/disable clock signals towards the lcd */ |
144 | static void lcd_controller_power(bool on) | 144 | static void lcd_controller_power(bool on) |
145 | { | 145 | { |
146 | if (on) { | 146 | if (on) { |
147 | LCDCON1 |= 0x80003; | 147 | LCDCON1 |= 0x80003; |
148 | } | 148 | } |
149 | else { | 149 | else { |
150 | LCDCON1 &= ~0x80003; | 150 | LCDCON1 &= ~0x80003; |
151 | } | 151 | } |
152 | } | 152 | } |
153 | 153 | ||
154 | /* lcd init configuration for lcd type 1 */ | 154 | /* lcd init configuration for lcd type 1 */ |
155 | static void lcd_init1(void) | 155 | static void lcd_init1(void) |
156 | { | 156 | { |
157 | lcd_write_reg(0x07, 0x0000); /* display control */ | 157 | lcd_write_reg(0x07, 0x0000); /* display control */ |
158 | lcd_write_reg(0x13, 0x0000); /* power control 3 */ | 158 | lcd_write_reg(0x13, 0x0000); /* power control 3 */ |
159 | lcd_delay(166670); | 159 | lcd_delay(166670); |
160 | 160 | ||
161 | lcd_write_reg(0x11, 0x3304); /* power control 2 */ | 161 | lcd_write_reg(0x11, 0x3304); /* power control 2 */ |
162 | lcd_write_reg(0x14, 0x1300); /* power control 4 */ | 162 | lcd_write_reg(0x14, 0x1300); /* power control 4 */ |
163 | lcd_write_reg(0x10, 0x1A20); /* power control 1 */ | 163 | lcd_write_reg(0x10, 0x1A20); /* power control 1 */ |
164 | lcd_write_reg(0x13, 0x0040); /* power control 3 */ | 164 | lcd_write_reg(0x13, 0x0040); /* power control 3 */ |
165 | lcd_delay(833350); | 165 | lcd_delay(833350); |
166 | 166 | ||
167 | lcd_write_reg(0x13, 0x0060); /* power control 3 */ | 167 | lcd_write_reg(0x13, 0x0060); /* power control 3 */ |
168 | lcd_write_reg(0x13, 0x0070); /* power control 3 */ | 168 | lcd_write_reg(0x13, 0x0070); /* power control 3 */ |
169 | lcd_delay(3333400); | 169 | lcd_delay(3333400); |
170 | 170 | ||
171 | lcd_write_reg(0x01, 0x0127); /* driver output control */ | 171 | lcd_write_reg(0x01, 0x0127); /* driver output control */ |
172 | lcd_write_reg(0x02, 0x0700); /* lcd driving waveform control */ | 172 | lcd_write_reg(0x02, 0x0700); /* lcd driving waveform control */ |
173 | lcd_write_reg(0x03, 0x1030); /* entry mode */ | 173 | lcd_write_reg(0x03, 0x1030); /* entry mode */ |
174 | lcd_write_reg(0x08, 0x0208); /* blank period control 1 */ | 174 | lcd_write_reg(0x08, 0x0208); /* blank period control 1 */ |
175 | lcd_write_reg(0x0B, 0x0620); /* frame cycle control */ | 175 | lcd_write_reg(0x0B, 0x0620); /* frame cycle control */ |
176 | lcd_write_reg(0x0C, 0x0110); /* external interface control */ | 176 | lcd_write_reg(0x0C, 0x0110); /* external interface control */ |
177 | lcd_write_reg(0x30, 0x0120); /* gamma control 1 */ | 177 | lcd_write_reg(0x30, 0x0120); /* gamma control 1 */ |
178 | lcd_write_reg(0x31, 0x0117); /* gamma control 2 */ | 178 | lcd_write_reg(0x31, 0x0117); /* gamma control 2 */ |
179 | lcd_write_reg(0x32, 0x0000); /* gamma control 3 */ | 179 | lcd_write_reg(0x32, 0x0000); /* gamma control 3 */ |
180 | lcd_write_reg(0x33, 0x0305); /* gamma control 4 */ | 180 | lcd_write_reg(0x33, 0x0305); /* gamma control 4 */ |
181 | lcd_write_reg(0x34, 0x0717); /* gamma control 5 */ | 181 | lcd_write_reg(0x34, 0x0717); /* gamma control 5 */ |
182 | lcd_write_reg(0x35, 0x0124); /* gamma control 6 */ | 182 | lcd_write_reg(0x35, 0x0124); /* gamma control 6 */ |
183 | lcd_write_reg(0x36, 0x0706); /* gamma control 7 */ | 183 | lcd_write_reg(0x36, 0x0706); /* gamma control 7 */ |
184 | lcd_write_reg(0x37, 0x0503); /* gamma control 8 */ | 184 | lcd_write_reg(0x37, 0x0503); /* gamma control 8 */ |
185 | lcd_write_reg(0x38, 0x1F03); /* gamma control 9 */ | 185 | lcd_write_reg(0x38, 0x1F03); /* gamma control 9 */ |
186 | lcd_write_reg(0x39, 0x0009); /* gamma control 10 */ | 186 | lcd_write_reg(0x39, 0x0009); /* gamma control 10 */ |
187 | lcd_write_reg(0x40, 0x0000); /* gate scan position */ | 187 | lcd_write_reg(0x40, 0x0000); /* gate scan position */ |
188 | lcd_write_reg(0x41, 0x0000); /* vertical scroll control */ | 188 | lcd_write_reg(0x41, 0x0000); /* vertical scroll control */ |
189 | lcd_write_reg(0x42, 0x013F); /* 1st screen driving position (end) */ | 189 | lcd_write_reg(0x42, 0x013F); /* 1st screen driving position (end) */ |
190 | lcd_write_reg(0x43, 0x0000); /* 1st screen driving position (start) */ | 190 | lcd_write_reg(0x43, 0x0000); /* 1st screen driving position (start) */ |
191 | lcd_write_reg(0x44, 0x013F); /* 2nd screen driving position (end) */ | 191 | lcd_write_reg(0x44, 0x013F); /* 2nd screen driving position (end) */ |
192 | lcd_write_reg(0x45, 0x0000); /* 2nd screen driving position (start) */ | 192 | lcd_write_reg(0x45, 0x0000); /* 2nd screen driving position (start) */ |
193 | lcd_write_reg(0x46, 0xEF00); /* horizontal window address */ | 193 | lcd_write_reg(0x46, 0xEF00); /* horizontal window address */ |
194 | lcd_write_reg(0x47, 0x013F); /* vertical window address (end) */ | 194 | lcd_write_reg(0x47, 0x013F); /* vertical window address (end) */ |
195 | lcd_write_reg(0x48, 0x0000); /* vertical window address (start) */ | 195 | lcd_write_reg(0x48, 0x0000); /* vertical window address (start) */ |
196 | 196 | ||
197 | lcd_write_reg(0x07, 0x0015); /* display control */ | 197 | lcd_write_reg(0x07, 0x0015); /* display control */ |
198 | lcd_delay(500000); | 198 | lcd_delay(500000); |
199 | lcd_write_reg(0x07, 0x0017); /* display control */ | 199 | lcd_write_reg(0x07, 0x0017); /* display control */ |
200 | 200 | ||
201 | lcd_write_reg(0x20, 0x0000); /* RAM address set (low part) */ | 201 | lcd_write_reg(0x20, 0x0000); /* RAM address set (low part) */ |
202 | lcd_write_reg(0x21, 0x0000); /* RAM address set (high part) */ | 202 | lcd_write_reg(0x21, 0x0000); /* RAM address set (high part) */ |
203 | lcd_write_reg(0x22, 0x0000); /* write data to GRAM */ | 203 | lcd_write_reg(0x22, 0x0000); /* write data to GRAM */ |
204 | } | 204 | } |
205 | 205 | ||
206 | /* lcd init configuration for lcd type 2 */ | 206 | /* lcd init configuration for lcd type 2 */ |
207 | static void lcd_init2(void) | 207 | static void lcd_init2(void) |
208 | { | 208 | { |
209 | lcd_write_reg(0x07, 0x0000); | 209 | lcd_write_reg(0x07, 0x0000); |
210 | lcd_write_reg(0x12, 0x0000); | 210 | lcd_write_reg(0x12, 0x0000); |
211 | lcd_delay(166670); | 211 | lcd_delay(166670); |
212 | 212 | ||
213 | lcd_write_reg(0x11, 0x000C); | 213 | lcd_write_reg(0x11, 0x000C); |
214 | lcd_write_reg(0x12, 0x0A1C); | 214 | lcd_write_reg(0x12, 0x0A1C); |
215 | lcd_write_reg(0x13, 0x0022); | 215 | lcd_write_reg(0x13, 0x0022); |
216 | lcd_write_reg(0x14, 0x0000); | 216 | lcd_write_reg(0x14, 0x0000); |
217 | 217 | ||
218 | lcd_write_reg(0x10, 0x7404); | 218 | lcd_write_reg(0x10, 0x7404); |
219 | lcd_write_reg(0x11, 0x0738); | 219 | lcd_write_reg(0x11, 0x0738); |
220 | lcd_write_reg(0x10, 0x7404); | 220 | lcd_write_reg(0x10, 0x7404); |
221 | lcd_delay(833350); | 221 | lcd_delay(833350); |
222 | 222 | ||
223 | lcd_write_reg(0x07, 0x0009); | 223 | lcd_write_reg(0x07, 0x0009); |
224 | lcd_write_reg(0x12, 0x065C); | 224 | lcd_write_reg(0x12, 0x065C); |
225 | lcd_delay(3333400); | 225 | lcd_delay(3333400); |
226 | 226 | ||
227 | lcd_write_reg(0x01, 0xE127); | 227 | lcd_write_reg(0x01, 0xE127); |
228 | lcd_write_reg(0x02, 0x0300); | 228 | lcd_write_reg(0x02, 0x0300); |
229 | lcd_write_reg(0x03, 0x1100); | 229 | lcd_write_reg(0x03, 0x1100); |
230 | lcd_write_reg(0x08, 0x0008); | 230 | lcd_write_reg(0x08, 0x0008); |
231 | lcd_write_reg(0x0B, 0x0000); | 231 | lcd_write_reg(0x0B, 0x0000); |
232 | lcd_write_reg(0x0C, 0x0000); | 232 | lcd_write_reg(0x0C, 0x0000); |
233 | lcd_write_reg(0x0D, 0x0007); | 233 | lcd_write_reg(0x0D, 0x0007); |
234 | lcd_write_reg(0x15, 0x0003); | 234 | lcd_write_reg(0x15, 0x0003); |
235 | lcd_write_reg(0x16, 0x0014); | 235 | lcd_write_reg(0x16, 0x0014); |
236 | lcd_write_reg(0x17, 0x0000); | 236 | lcd_write_reg(0x17, 0x0000); |
237 | 237 | ||
238 | lcd_write_reg(0x30, 0x0503); /* gamma? */ | 238 | lcd_write_reg(0x30, 0x0503); /* gamma? */ |
239 | lcd_write_reg(0x31, 0x0303); | 239 | lcd_write_reg(0x31, 0x0303); |
240 | lcd_write_reg(0x32, 0x0305); | 240 | lcd_write_reg(0x32, 0x0305); |
241 | lcd_write_reg(0x33, 0x0202); | 241 | lcd_write_reg(0x33, 0x0202); |
242 | lcd_write_reg(0x34, 0x0204); | 242 | lcd_write_reg(0x34, 0x0204); |
243 | lcd_write_reg(0x35, 0x0404); | 243 | lcd_write_reg(0x35, 0x0404); |
244 | lcd_write_reg(0x36, 0x0402); | 244 | lcd_write_reg(0x36, 0x0402); |
245 | lcd_write_reg(0x37, 0x0202); | 245 | lcd_write_reg(0x37, 0x0202); |
246 | lcd_write_reg(0x38, 0x1000); | 246 | lcd_write_reg(0x38, 0x1000); |
247 | lcd_write_reg(0x39, 0x1000); | 247 | lcd_write_reg(0x39, 0x1000); |
248 | 248 | ||
249 | lcd_write_reg(0x07, 0x0009); | 249 | lcd_write_reg(0x07, 0x0009); |
250 | lcd_delay(666680); | 250 | lcd_delay(666680); |
251 | 251 | ||
252 | lcd_write_reg(0x07, 0x0109); | 252 | lcd_write_reg(0x07, 0x0109); |
253 | lcd_delay(666680); | 253 | lcd_delay(666680); |
254 | 254 | ||
255 | lcd_write_reg(0x07, 0x010B); | 255 | lcd_write_reg(0x07, 0x010B); |
256 | } | 256 | } |
257 | 257 | ||
258 | /* lcd enable for lcd type 1 */ | 258 | /* lcd enable for lcd type 1 */ |
259 | static void lcd_enable1(bool on) | 259 | static void lcd_enable1(bool on) |
260 | { | 260 | { |
261 | if (on) { | 261 | if (on) { |
262 | lcd_write_reg(0x00, 0x0001); /* start oscillation */ | 262 | lcd_write_reg(0x00, 0x0001); /* start oscillation */ |
263 | lcd_delay(166670); | 263 | lcd_delay(166670); |
264 | lcd_write_reg(0x10, 0x0000); /* power control 1 */ | 264 | lcd_write_reg(0x10, 0x0000); /* power control 1 */ |
265 | lcd_delay(166670); | 265 | lcd_delay(166670); |
266 | 266 | ||
267 | lcd_write_reg(0x11, 0x3304); /* power control 2 */ | 267 | lcd_write_reg(0x11, 0x3304); /* power control 2 */ |
268 | lcd_write_reg(0x14, 0x1300); /* power control 4 */ | 268 | lcd_write_reg(0x14, 0x1300); /* power control 4 */ |
269 | lcd_write_reg(0x10, 0x1A20); /* power control 1 */ | 269 | lcd_write_reg(0x10, 0x1A20); /* power control 1 */ |
270 | lcd_write_reg(0x07, 0x0015); /* display control */ | 270 | lcd_write_reg(0x07, 0x0015); /* display control */ |
271 | lcd_delay(500000); | 271 | lcd_delay(500000); |
272 | 272 | ||
273 | lcd_write_reg(0x20, 0x0000); /* RAM address set (low part) */ | 273 | lcd_write_reg(0x20, 0x0000); /* RAM address set (low part) */ |
274 | lcd_write_reg(0x21, 0x0000); /* RAM address set (high part) */ | 274 | lcd_write_reg(0x21, 0x0000); /* RAM address set (high part) */ |
275 | lcd_write_reg(0x22, 0x0000); /* write data to GRAM */ | 275 | lcd_write_reg(0x22, 0x0000); /* write data to GRAM */ |
276 | } | 276 | } |
277 | else { | 277 | else { |
278 | lcd_write_reg(0x07, 0x0016); /* display control */ | 278 | lcd_write_reg(0x07, 0x0016); /* display control */ |
279 | lcd_delay(166670 * 4); | 279 | lcd_delay(166670 * 4); |
280 | lcd_write_reg(0x07, 0x0004); /* display control */ | 280 | lcd_write_reg(0x07, 0x0004); /* display control */ |
281 | lcd_delay(166670 * 4); | 281 | lcd_delay(166670 * 4); |
282 | 282 | ||
283 | lcd_write_reg(0x10, 0x1E21); /* power control 1 */ | 283 | lcd_write_reg(0x10, 0x1E21); /* power control 1 */ |
284 | lcd_delay(166670); | 284 | lcd_delay(166670); |
285 | } | 285 | } |
286 | } | 286 | } |
287 | 287 | ||
288 | /* lcd enable for lcd type 2 */ | 288 | /* lcd enable for lcd type 2 */ |
289 | static void lcd_enable2(bool on) | 289 | static void lcd_enable2(bool on) |
290 | { | 290 | { |
291 | if (on) { | 291 | if (on) { |
292 | lcd_write_reg(0x10, 0x0400); | 292 | lcd_write_reg(0x10, 0x0400); |
293 | lcd_delay(666680); | 293 | lcd_delay(666680); |
294 | 294 | ||
295 | lcd_write_reg(0x07, 0x0000); | 295 | lcd_write_reg(0x07, 0x0000); |
296 | lcd_write_reg(0x12, 0x0000); | 296 | lcd_write_reg(0x12, 0x0000); |
297 | lcd_delay(166670); | 297 | lcd_delay(166670); |
298 | 298 | ||
299 | lcd_write_reg(0x11, 0x000C); | 299 | lcd_write_reg(0x11, 0x000C); |
300 | lcd_write_reg(0x12, 0x0A1C); | 300 | lcd_write_reg(0x12, 0x0A1C); |
301 | lcd_write_reg(0x13, 0x0022); | 301 | lcd_write_reg(0x13, 0x0022); |
302 | lcd_write_reg(0x14, 0x0000); | 302 | lcd_write_reg(0x14, 0x0000); |
303 | lcd_write_reg(0x10, 0x7404); | 303 | lcd_write_reg(0x10, 0x7404); |
304 | lcd_write_reg(0x11, 0x0738); | 304 | lcd_write_reg(0x11, 0x0738); |
305 | lcd_write_reg(0x10, 0x7404); | 305 | lcd_write_reg(0x10, 0x7404); |
306 | lcd_delay(833350); | 306 | lcd_delay(833350); |
307 | 307 | ||
308 | lcd_write_reg(0x07, 0x0009); | 308 | lcd_write_reg(0x07, 0x0009); |
309 | lcd_write_reg(0x12, 0x065C); | 309 | lcd_write_reg(0x12, 0x065C); |
310 | lcd_delay(3333400); | 310 | lcd_delay(3333400); |
311 | 311 | ||
312 | lcd_write_reg(0x0B, 0x0000); | 312 | lcd_write_reg(0x0B, 0x0000); |
313 | lcd_write_reg(0x07, 0x0009); | 313 | lcd_write_reg(0x07, 0x0009); |
314 | lcd_delay(666680); | 314 | lcd_delay(666680); |
315 | 315 | ||
316 | lcd_write_reg(0x07, 0x0109); | 316 | lcd_write_reg(0x07, 0x0109); |
317 | lcd_delay(666680); | 317 | lcd_delay(666680); |
318 | 318 | ||
319 | lcd_write_reg(0x07, 0x010B); | 319 | lcd_write_reg(0x07, 0x010B); |
320 | } | 320 | } |
321 | else { | 321 | else { |
322 | lcd_write_reg(0x0B, 0x0109); | 322 | lcd_write_reg(0x0B, 0x0109); |
323 | lcd_write_reg(0x07, 0x0009); | 323 | lcd_write_reg(0x07, 0x0009); |
324 | lcd_delay(666680); | 324 | lcd_delay(666680); |
325 | 325 | ||
326 | lcd_write_reg(0x07, 0x0008); | 326 | lcd_write_reg(0x07, 0x0008); |
327 | lcd_delay(666680); | 327 | lcd_delay(666680); |
328 | 328 | ||
329 | lcd_write_reg(0x10, 0x0400); | 329 | lcd_write_reg(0x10, 0x0400); |
330 | lcd_write_reg(0x10, 0x0401); | 330 | lcd_write_reg(0x10, 0x0401); |
331 | lcd_delay(166670); | 331 | lcd_delay(166670); |
332 | } | 332 | } |
333 | } | 333 | } |
334 | 334 | ||
335 | /* turn both the lcd controller and the lcd itself on or off */ | 335 | /* turn both the lcd controller and the lcd itself on or off */ |
336 | void lcd_enable(bool on) | 336 | void lcd_enable(bool on) |
337 | { | ||
338 | if (on) { | ||
339 | /* enable controller clock */ | ||
340 | PWRCON &= ~(1 << 18); | ||
341 | |||
342 | lcd_controller_power(true); | ||
343 | lcd_delay(166670); | ||
344 | } | ||
345 | |||
346 | /* call type specific power function */ | ||
347 | if (lcd_type == 1) { | ||
348 | lcd_enable1(on); | ||
349 | } | ||
350 | else { | ||
351 | lcd_enable2(on); | ||
352 | } | ||
353 | |||
354 | if (!on) { | ||
355 | lcd_controller_power(false); | ||
356 | |||
357 | /* disable controller clock */ | ||
358 | PWRCON |= (1 << 18); | ||
359 | } | ||
360 | } | ||
361 | |||
362 | /* initialise the lcd controller inside the s5l8700 */ | ||
363 | static void lcd_controller_init(void) | ||
337 | { | 364 | { |
338 | if (on) { | ||
339 | /* enable controller clock */ | ||
340 | PWRCON &= ~(1 << 18); | ||
341 | |||
342 | lcd_controller_power(true); | ||
343 | lcd_delay(166670); | ||
344 | } | ||
345 | |||
346 | /* call type specific power function */ | ||
347 | if (lcd_type == 1) { | ||
348 | lcd_enable1(on); | ||
349 | } | ||
350 | else { | ||
351 | lcd_enable2(on); | ||
352 | } | ||
353 | |||
354 | if (!on) { | ||
355 | lcd_controller_power(false); | ||
356 | |||
357 | /* disable controller clock */ | ||
358 | PWRCON |= (1 << 18); | ||
359 | } | ||
360 | } | ||
361 | |||
362 | /* initialise the lcd controller inside the s5l8700 */ | ||
363 | static void lcd_controller_init(void) | ||
364 | { | ||
365 | PWRCON &= ~(1 << 18); | 365 | PWRCON &= ~(1 << 18); |
366 | 366 | ||
367 | LCDCON1 = (0 << 28) | /* BURSTLEN */ | 367 | LCDCON1 = (0 << 28) | /* BURSTLEN */ |
@@ -379,80 +379,80 @@ static void lcd_controller_init(void) | |||
379 | (1 << 3); /* IVDEN */ | 379 | (1 << 3); /* IVDEN */ |
380 | LCDTCON1 = (lcd_type == 1) ? 0x070103 : 0x030303; | 380 | LCDTCON1 = (lcd_type == 1) ? 0x070103 : 0x030303; |
381 | LCDTCON2 = (lcd_type == 1) ? 0x070103 : 0x030703; | 381 | LCDTCON2 = (lcd_type == 1) ? 0x070103 : 0x030703; |
382 | LCDTCON3 = ((LCD_HEIGHT - 1) << 11) | (LCD_WIDTH - 1); | 382 | LCDTCON3 = ((LCD_HEIGHT - 1) << 11) | (LCD_WIDTH - 1); |
383 | LCDOSD1 = 0; | 383 | LCDOSD1 = 0; |
384 | LCDOSD2 = 0; | 384 | LCDOSD2 = 0; |
385 | LCDOSD3 = 0; | 385 | LCDOSD3 = 0; |
386 | 386 | ||
387 | LCDB1SADDR1 = 0; | 387 | LCDB1SADDR1 = 0; |
388 | LCDB2SADDR1 = 0; | 388 | LCDB2SADDR1 = 0; |
389 | LCDF1SADDR1 = 0; | 389 | LCDF1SADDR1 = 0; |
390 | LCDF2SADDR1 = 0; | 390 | LCDF2SADDR1 = 0; |
391 | LCDB1SADDR2 = 0; | 391 | LCDB1SADDR2 = 0; |
392 | LCDB2SADDR2 = 0; | 392 | LCDB2SADDR2 = 0; |
393 | LCDF1SADDR2 = 0; | 393 | LCDF1SADDR2 = 0; |
394 | LCDF2SADDR2 = 0; | 394 | LCDF2SADDR2 = 0; |
395 | LCDB1SADDR3 = 0; | 395 | LCDB1SADDR3 = 0; |
396 | LCDB2SADDR3 = 0; | 396 | LCDB2SADDR3 = 0; |
397 | LCDF1SADDR3 = 0; | 397 | LCDF1SADDR3 = 0; |
398 | LCDF2SADDR3 = 0; | 398 | LCDF2SADDR3 = 0; |
399 | 399 | ||
400 | LCDKEYCON = 0; | 400 | LCDKEYCON = 0; |
401 | LCDCOLVAL = 0; | 401 | LCDCOLVAL = 0; |
402 | LCDBGCON = 0; | 402 | LCDBGCON = 0; |
403 | LCDFGCON = 0; | 403 | LCDFGCON = 0; |
404 | LCDDITHMODE = 0; | 404 | LCDDITHMODE = 0; |
405 | 405 | ||
406 | LCDINTCON = 0; | 406 | LCDINTCON = 0; |
407 | } | 407 | } |
408 | 408 | ||
409 | void lcd_init_device(void) | 409 | void lcd_init_device(void) |
410 | { | 410 | { |
411 | unsigned int lcd_id; | 411 | unsigned int lcd_id; |
412 | uint32_t fb, fb_end, window; | 412 | uint32_t fb, fb_end, window; |
413 | 413 | ||
414 | /* configure LCD SPI pins */ | 414 | /* configure LCD SPI pins */ |
415 | lcd_spi_init(); | 415 | lcd_spi_init(); |
416 | 416 | ||
417 | /* identify display through SPI */ | 417 | /* identify display through SPI */ |
418 | lcd_id = lcd_read_reg(0); | 418 | lcd_id = lcd_read_reg(0); |
419 | lcd_type = (lcd_id == LCD_TYPE1_ID) ? 1 : 2; | 419 | lcd_type = (lcd_id == LCD_TYPE1_ID) ? 1 : 2; |
420 | 420 | ||
421 | /* display specific init sequence */ | 421 | /* display specific init sequence */ |
422 | if (lcd_type == 1) { | 422 | if (lcd_type == 1) { |
423 | lcd_init1(); | 423 | lcd_init1(); |
424 | } | 424 | } |
425 | else { | 425 | else { |
426 | lcd_init2(); | 426 | lcd_init2(); |
427 | } | 427 | } |
428 | 428 | ||
429 | /* init LCD controller */ | 429 | /* init LCD controller */ |
430 | lcd_controller_init(); | 430 | lcd_controller_init(); |
431 | 431 | ||
432 | /* set framebuffer addresses */ | 432 | /* set framebuffer addresses */ |
433 | fb = (uint32_t) &lcd_framebuffer[0][0]; | 433 | fb = (uint32_t) &lcd_framebuffer[0][0]; |
434 | fb_end = (uint32_t) &lcd_framebuffer[LCD_HEIGHT][0]; | 434 | fb_end = (uint32_t) &lcd_framebuffer[LCD_HEIGHT][0]; |
435 | window = 2 * LCD_WIDTH; | 435 | window = 2 * LCD_WIDTH; |
436 | 436 | ||
437 | LCDB1SADDR1 = fb; | 437 | LCDB1SADDR1 = fb; |
438 | LCDB2SADDR1 = fb; | 438 | LCDB2SADDR1 = fb; |
439 | LCDF1SADDR1 = fb; | 439 | LCDF1SADDR1 = fb; |
440 | LCDF2SADDR1 = fb; | 440 | LCDF2SADDR1 = fb; |
441 | 441 | ||
442 | LCDB1SADDR2 = fb_end; | 442 | LCDB1SADDR2 = fb_end; |
443 | LCDB2SADDR2 = fb_end; | 443 | LCDB2SADDR2 = fb_end; |
444 | LCDF1SADDR2 = fb_end; LCDF2SADDR2 = fb_end; | 444 | LCDF1SADDR2 = fb_end; LCDF2SADDR2 = fb_end; |
445 | 445 | ||
446 | LCDB1SADDR3 = window; | 446 | LCDB1SADDR3 = window; |
447 | LCDB2SADDR3 = window; | 447 | LCDB2SADDR3 = window; |
448 | LCDF1SADDR3 = window; | 448 | LCDF1SADDR3 = window; |
449 | LCDF2SADDR3 = window; | 449 | LCDF2SADDR3 = window; |
450 | 450 | ||
451 | lcd_enable(true); | 451 | lcd_enable(true); |
452 | 452 | ||
453 | /* configure LCD pins */ | 453 | /* configure LCD pins */ |
454 | PCON_ASRAM = 1; | 454 | PCON_ASRAM = 1; |
455 | } | 455 | } |
456 | 456 | ||
457 | void lcd_update_rect(int x, int y, int width, int height) | 457 | void lcd_update_rect(int x, int y, int width, int height) |
458 | { | 458 | { |