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author | Cástor Muñoz <cmvidal@gmail.com> | 2016-05-12 03:16:27 +0200 |
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committer | Cástor Muñoz <cmvidal@gmail.com> | 2016-05-13 23:23:35 +0200 |
commit | d405026ca8bc4c63d8fcd5d63cef02341182774b (patch) | |
tree | 82fb19edcd02b68d0d336ca80f1c3ee4bd3be13c /firmware/target/arm/s5l8700/ipodnano2g/serial-nano2g.c | |
parent | 5017523a6b1ea9d230d8b8cf801ad3adbe7f43f5 (diff) | |
download | rockbox-d405026ca8bc4c63d8fcd5d63cef02341182774b.tar.gz rockbox-d405026ca8bc4c63d8fcd5d63cef02341182774b.zip |
iPod Nano2G: add HAVE_SERIAL
Change-Id: I46dca69c6708d3e6189f66e70badf0a594bac00b
Diffstat (limited to 'firmware/target/arm/s5l8700/ipodnano2g/serial-nano2g.c')
-rw-r--r-- | firmware/target/arm/s5l8700/ipodnano2g/serial-nano2g.c | 96 |
1 files changed, 96 insertions, 0 deletions
diff --git a/firmware/target/arm/s5l8700/ipodnano2g/serial-nano2g.c b/firmware/target/arm/s5l8700/ipodnano2g/serial-nano2g.c new file mode 100644 index 0000000000..487984fbe3 --- /dev/null +++ b/firmware/target/arm/s5l8700/ipodnano2g/serial-nano2g.c | |||
@@ -0,0 +1,96 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2014 by Cástor Muñoz | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | #include <stdint.h> | ||
22 | #include <stdbool.h> | ||
23 | |||
24 | #include "config.h" | ||
25 | #include "cpu.h" | ||
26 | #include "system.h" | ||
27 | #include "serial.h" | ||
28 | |||
29 | #include "s5l8700.h" | ||
30 | #include "uc870x.h" | ||
31 | |||
32 | /* Define LOGF_ENABLE to enable logf output in this file */ | ||
33 | #define LOGF_ENABLE | ||
34 | #include "logf.h" | ||
35 | |||
36 | |||
37 | /* shall include serial HW configuracion for specific target */ | ||
38 | #define NANO2G_UART_CLK_HZ 24000000 /* external OSC0 ??? */ | ||
39 | |||
40 | /* This values below are valid with a UCLK of 24MHz */ | ||
41 | #define BRDATA_9600 (155) /* 9615 */ | ||
42 | #define BRDATA_19200 (77) /* 19231 */ | ||
43 | #define BRDATA_28800 (51) /* 28846 */ | ||
44 | #define BRDATA_38400 (38) /* 38462 */ | ||
45 | #define BRDATA_57600 (25) /* 57692 */ | ||
46 | #define BRDATA_115200 (12) /* 115385 */ | ||
47 | |||
48 | |||
49 | extern const struct uartc s5l8701_uartc0; | ||
50 | |||
51 | struct uartc_port ser_port IDATA_ATTR = | ||
52 | { | ||
53 | /* location */ | ||
54 | .uartc = &s5l8701_uartc0, | ||
55 | .id = 0, | ||
56 | |||
57 | /* configuration */ | ||
58 | .rx_trg = UFCON_RX_FIFO_TRG_4, | ||
59 | .tx_trg = UFCON_TX_FIFO_TRG_EMPTY, | ||
60 | .clksel = UCON_CLKSEL_ECLK, | ||
61 | .clkhz = NANO2G_UART_CLK_HZ, | ||
62 | |||
63 | /* interrupt callbacks */ | ||
64 | .rx_cb = NULL, | ||
65 | .tx_cb = NULL, /* polling */ | ||
66 | }; | ||
67 | |||
68 | /* | ||
69 | * serial driver API | ||
70 | */ | ||
71 | void serial_setup(void) | ||
72 | { | ||
73 | uartc_port_open(&ser_port); | ||
74 | |||
75 | /* set a default configuration, Tx and Rx modes are | ||
76 | disabled when the port is initialized */ | ||
77 | uartc_port_config(&ser_port, ULCON_DATA_BITS_8, | ||
78 | ULCON_PARITY_NONE, ULCON_STOP_BITS_1); | ||
79 | uartc_port_set_bitrate_raw(&ser_port, BRDATA_115200); | ||
80 | |||
81 | /* enable Tx interrupt request or POLLING mode */ | ||
82 | uartc_port_set_tx_mode(&ser_port, UCON_MODE_INTREQ); | ||
83 | |||
84 | logf("[%lu] "MODEL_NAME" port %d ready!", | ||
85 | (uint32_t)USEC_TIMER, ser_port.id); | ||
86 | } | ||
87 | |||
88 | int tx_rdy(void) | ||
89 | { | ||
90 | return uartc_port_tx_ready(&ser_port) ? 1 : 0; | ||
91 | } | ||
92 | |||
93 | void tx_writec(unsigned char c) | ||
94 | { | ||
95 | uartc_port_tx_byte(&ser_port, c); | ||
96 | } | ||