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author | Michael Sevakis <jethead71@rockbox.org> | 2008-12-07 17:48:42 +0000 |
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committer | Michael Sevakis <jethead71@rockbox.org> | 2008-12-07 17:48:42 +0000 |
commit | 528ec2a55512679b5776df34d57f77a28bff3fc2 (patch) | |
tree | b335d4ee84afe19fd0de254d3f2ba1a4bb944dc1 /firmware/target/arm/s3c2440/gigabeat-fx | |
parent | 8289b966b810eb21732ecb905433debf4e872857 (diff) | |
download | rockbox-528ec2a55512679b5776df34d57f77a28bff3fc2.tar.gz rockbox-528ec2a55512679b5776df34d57f77a28bff3fc2.zip |
Meg F/X: Radically changing divider settings messed up the fake sleep in the bootloader. They aren't reset even after powering off. Make sure they are always specified. Move that code to target tree as well.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19358 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/s3c2440/gigabeat-fx')
-rw-r--r-- | firmware/target/arm/s3c2440/gigabeat-fx/kernel-meg-fx.c | 28 |
1 files changed, 27 insertions, 1 deletions
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/kernel-meg-fx.c b/firmware/target/arm/s3c2440/gigabeat-fx/kernel-meg-fx.c index 5ef8c8023a..6a750c32e2 100644 --- a/firmware/target/arm/s3c2440/gigabeat-fx/kernel-meg-fx.c +++ b/firmware/target/arm/s3c2440/gigabeat-fx/kernel-meg-fx.c | |||
@@ -24,7 +24,7 @@ | |||
24 | #include "timer.h" | 24 | #include "timer.h" |
25 | #include "thread.h" | 25 | #include "thread.h" |
26 | 26 | ||
27 | void tick_start(unsigned int interval_in_ms) | 27 | static inline void tick_set(unsigned int interval_in_ms) |
28 | { | 28 | { |
29 | /* | 29 | /* |
30 | * Based on default PCLK of 49.1568MHz - scaling chosen to give | 30 | * Based on default PCLK of 49.1568MHz - scaling chosen to give |
@@ -49,6 +49,12 @@ void tick_start(unsigned int interval_in_ms) | |||
49 | TCON |= 1 << 21; | 49 | TCON |= 1 << 21; |
50 | /* reset manual bit */ | 50 | /* reset manual bit */ |
51 | TCON &= ~(1 << 21); | 51 | TCON &= ~(1 << 21); |
52 | } | ||
53 | |||
54 | void tick_start(unsigned int interval_in_ms) | ||
55 | { | ||
56 | tick_set(interval_in_ms); | ||
57 | |||
52 | /* interval mode */ | 58 | /* interval mode */ |
53 | TCON |= 1 << 22; | 59 | TCON |= 1 << 22; |
54 | /* start timer 4 */ | 60 | /* start timer 4 */ |
@@ -58,6 +64,26 @@ void tick_start(unsigned int interval_in_ms) | |||
58 | INTMSK &= ~TIMER4_MASK; | 64 | INTMSK &= ~TIMER4_MASK; |
59 | } | 65 | } |
60 | 66 | ||
67 | #ifdef BOOTLOADER | ||
68 | void delay(int ticks) | ||
69 | { | ||
70 | volatile unsigned long counter; | ||
71 | |||
72 | INTMSK |= TIMER4_MASK; | ||
73 | |||
74 | tick_set(1000 * ticks / HZ); | ||
75 | |||
76 | /* autoreload Off */ | ||
77 | TCON &= ~(1 << 22); | ||
78 | /* start timer 4 */ | ||
79 | TCON |= (1 << 20); | ||
80 | |||
81 | do { | ||
82 | counter = TCNTO4; | ||
83 | } while(counter > 0); | ||
84 | } | ||
85 | #endif /* BOOTLOADER */ | ||
86 | |||
61 | void TIMER4(void) | 87 | void TIMER4(void) |
62 | { | 88 | { |
63 | /* Run through the list of tick tasks */ | 89 | /* Run through the list of tick tasks */ |