diff options
| author | Michael Sevakis <jethead71@rockbox.org> | 2008-03-31 01:29:50 +0000 |
|---|---|---|
| committer | Michael Sevakis <jethead71@rockbox.org> | 2008-03-31 01:29:50 +0000 |
| commit | a65406e3f48daed80f4d1b8627fae38a683fecb6 (patch) | |
| tree | 0ba581f99dfcf18727fa05152b5a8b25fae86410 /firmware/target/arm/s3c2440/gigabeat-fx/system-target.h | |
| parent | 241fd0fbdb218518cabbc6430dc0159b348549bc (diff) | |
| download | rockbox-a65406e3f48daed80f4d1b8627fae38a683fecb6.tar.gz rockbox-a65406e3f48daed80f4d1b8627fae38a683fecb6.zip | |
meg-fx: It's important to make sure certain interrupt-related registers have bits changed atomically.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16894 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/s3c2440/gigabeat-fx/system-target.h')
| -rw-r--r-- | firmware/target/arm/s3c2440/gigabeat-fx/system-target.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/system-target.h b/firmware/target/arm/s3c2440/gigabeat-fx/system-target.h index 2fab652596..5df02effa9 100644 --- a/firmware/target/arm/s3c2440/gigabeat-fx/system-target.h +++ b/firmware/target/arm/s3c2440/gigabeat-fx/system-target.h | |||
| @@ -26,6 +26,15 @@ | |||
| 26 | #define CPUFREQ_NORMAL 98784000 | 26 | #define CPUFREQ_NORMAL 98784000 |
| 27 | #define CPUFREQ_MAX 296352000 | 27 | #define CPUFREQ_MAX 296352000 |
| 28 | 28 | ||
| 29 | /* Functions to set and clear regiser bits atomically */ | ||
| 30 | |||
| 31 | /* Set and clear register bits */ | ||
| 32 | void s3c_regmod(volatile int *reg, unsigned int set, unsigned int clr); | ||
| 33 | /* Set register bits */ | ||
| 34 | void s3c_regset(volatile int *reg, unsigned int mask); | ||
| 35 | /* Clear register bits */ | ||
| 36 | void s3c_regclr(volatile int *reg, unsigned int mask); | ||
| 37 | |||
| 29 | #define HAVE_INVALIDATE_ICACHE | 38 | #define HAVE_INVALIDATE_ICACHE |
| 30 | static inline void invalidate_icache(void) | 39 | static inline void invalidate_icache(void) |
| 31 | { | 40 | { |