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author | Rafaël Carré <rafael.carre@gmail.com> | 2012-01-03 04:23:24 +0000 |
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committer | Rafaël Carré <rafael.carre@gmail.com> | 2012-01-03 04:23:24 +0000 |
commit | a9b997708399263d5a2d1469b4c41f11513f12de (patch) | |
tree | 6d41266fdecdd6948ae5d20f6d575f742840d171 /firmware/target/arm/pp/ata-target.h | |
parent | 4ef988bfb469291ce018e7daafb99d41f71c35fc (diff) | |
download | rockbox-a9b997708399263d5a2d1469b4c41f11513f12de.tar.gz rockbox-a9b997708399263d5a2d1469b4c41f11513f12de.zip |
Move PP-specific headers to pp/ directory
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31530 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/pp/ata-target.h')
-rw-r--r-- | firmware/target/arm/pp/ata-target.h | 92 |
1 files changed, 92 insertions, 0 deletions
diff --git a/firmware/target/arm/pp/ata-target.h b/firmware/target/arm/pp/ata-target.h new file mode 100644 index 0000000000..616c451579 --- /dev/null +++ b/firmware/target/arm/pp/ata-target.h | |||
@@ -0,0 +1,92 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2006 by Barry Wardell | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | |||
22 | #ifndef ATA_TARGET_H | ||
23 | #define ATA_TARGET_H | ||
24 | |||
25 | #include "config.h" | ||
26 | |||
27 | #ifdef CPU_PP | ||
28 | |||
29 | #ifdef HAVE_BOOTLOADER_USB_MODE | ||
30 | #define ATA_DRIVER_CLOSE | ||
31 | #endif | ||
32 | |||
33 | /* primary channel */ | ||
34 | #define ATA_DATA (*((volatile unsigned short*)(IDE_BASE + 0x1e0))) | ||
35 | #define ATA_ERROR (*((volatile unsigned char*)(IDE_BASE + 0x1e4))) | ||
36 | #define ATA_NSECTOR (*((volatile unsigned char*)(IDE_BASE + 0x1e8))) | ||
37 | #define ATA_SECTOR (*((volatile unsigned char*)(IDE_BASE + 0x1ec))) | ||
38 | #define ATA_LCYL (*((volatile unsigned char*)(IDE_BASE + 0x1f0))) | ||
39 | #define ATA_HCYL (*((volatile unsigned char*)(IDE_BASE + 0x1f4))) | ||
40 | #define ATA_SELECT (*((volatile unsigned char*)(IDE_BASE + 0x1f8))) | ||
41 | #define ATA_COMMAND (*((volatile unsigned char*)(IDE_BASE + 0x1fc))) | ||
42 | #define ATA_CONTROL (*((volatile unsigned char*)(IDE_BASE + 0x3f8))) | ||
43 | |||
44 | #if (CONFIG_CPU == PP5002) | ||
45 | |||
46 | #define ATA_OUT8(reg,val) do { reg = (val); \ | ||
47 | while (!(IDE_CFG_STATUS & 0x40)); \ | ||
48 | } while (0) | ||
49 | |||
50 | /* Plain C reading and writing. See comment in ata-as-arm.S */ | ||
51 | |||
52 | #elif defined CPU_PP502x | ||
53 | |||
54 | /* asm optimized reading and writing */ | ||
55 | #define ATA_OPTIMIZED_READING | ||
56 | #define ATA_OPTIMIZED_WRITING | ||
57 | |||
58 | #endif /* CONFIG_CPU */ | ||
59 | |||
60 | #endif | ||
61 | |||
62 | #ifdef HAVE_ATA_DMA | ||
63 | |||
64 | /* IDE DMA controller registers */ | ||
65 | #define IDE_DMA_CONTROL (*(volatile unsigned long *)(0xc3000400)) | ||
66 | #define IDE_DMA_LENGTH (*(volatile unsigned long *)(0xc3000408)) | ||
67 | #define IDE_DMA_ADDR (*(volatile unsigned long *)(0xc300040C)) | ||
68 | |||
69 | /* Maximum multi-word DMA mode supported by the controller */ | ||
70 | #define ATA_MAX_MWDMA 2 | ||
71 | |||
72 | #ifndef BOOTLOADER | ||
73 | /* The PP5020 supports UDMA 4, but it needs cpu boosting and only | ||
74 | * improves performance by ~10% with a stock disk. | ||
75 | * UDMA 2 is stable at 30 Mhz. | ||
76 | * UDMA 1 is stable at 24 Mhz. | ||
77 | */ | ||
78 | #if CPUFREQ_NORMAL >= 30000000 | ||
79 | #define ATA_MAX_UDMA 2 | ||
80 | #elif CPUFREQ_NORMAL >= 24000000 | ||
81 | #define ATA_MAX_UDMA 1 | ||
82 | #else | ||
83 | #error "CPU speeds under 24Mhz have not been tested with DMA" | ||
84 | #endif | ||
85 | #else | ||
86 | /* The bootloader runs at 24 Mhz and needs a slower mode */ | ||
87 | #define ATA_MAX_UDMA 1 | ||
88 | #endif | ||
89 | |||
90 | #endif /* HAVE_ATA_DMA */ | ||
91 | |||
92 | #endif /* ATA_TARGET_H */ | ||