summaryrefslogtreecommitdiff
path: root/firmware/target/arm/mmu-arm.h
diff options
context:
space:
mode:
authorMichael Sevakis <jethead71@rockbox.org>2009-02-11 23:56:00 +0000
committerMichael Sevakis <jethead71@rockbox.org>2009-02-11 23:56:00 +0000
commit63e709c7c83a3c0a462275d6b7c053804127e295 (patch)
treeba6b42e381886d8803b607e34567e14ef77436fe /firmware/target/arm/mmu-arm.h
parent00a9685985881866dd08d9dc38ef58e93a27917f (diff)
downloadrockbox-63e709c7c83a3c0a462275d6b7c053804127e295.tar.gz
rockbox-63e709c7c83a3c0a462275d6b7c053804127e295.zip
Refine the routines in mmu-arm.c and move them to mmu-arm.S since the code is now 100% assembly.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19980 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/mmu-arm.h')
-rw-r--r--firmware/target/arm/mmu-arm.h20
1 files changed, 17 insertions, 3 deletions
diff --git a/firmware/target/arm/mmu-arm.h b/firmware/target/arm/mmu-arm.h
index b6b23e6185..7058fffddc 100644
--- a/firmware/target/arm/mmu-arm.h
+++ b/firmware/target/arm/mmu-arm.h
@@ -18,11 +18,14 @@
18 * KIND, either express or implied. 18 * KIND, either express or implied.
19 * 19 *
20 ****************************************************************************/ 20 ****************************************************************************/
21#ifndef MMU_ARM_H
22#define MMY_ARM_H
21 23
22#define CACHE_ALL 0x0C 24#define CACHE_ALL 0x0C
23#define CACHE_NONE 0 25#define CACHE_NONE 0
24#define BUFFERED 0x04 26#define BUFFERED 0x04
25 27
28void memory_init(void);
26void ttb_init(void); 29void ttb_init(void);
27void enable_mmu(void); 30void enable_mmu(void);
28void map_section(unsigned int pa, unsigned int va, int mb, int flags); 31void map_section(unsigned int pa, unsigned int va, int mb, int flags);
@@ -30,8 +33,12 @@ void map_section(unsigned int pa, unsigned int va, int mb, int flags);
30/* Cleans entire DCache */ 33/* Cleans entire DCache */
31void clean_dcache(void); 34void clean_dcache(void);
32 35
36/* Invalidate entire DCache */
37/* will do writeback */
38void invalidate_dcache(void);
39
33/* Invalidate DCache for this range */ 40/* Invalidate DCache for this range */
34/* Will do write back */ 41/* will do writeback */
35void invalidate_dcache_range(const void *base, unsigned int size); 42void invalidate_dcache_range(const void *base, unsigned int size);
36 43
37/* clean DCache for this range */ 44/* clean DCache for this range */
@@ -39,7 +46,14 @@ void invalidate_dcache_range(const void *base, unsigned int size);
39void clean_dcache_range(const void *base, unsigned int size); 46void clean_dcache_range(const void *base, unsigned int size);
40 47
41/* Dump DCache for this range */ 48/* Dump DCache for this range */
42/* Will *NOT* do write back */ 49/* Will *NOT* do write back except for buffer ends not on a line boundary */
43void dump_dcache_range(const void *base, unsigned int size); 50void dump_dcache_range(const void *base, unsigned int size);
44 51
45void memory_init(void); 52/* Invalidate entire ICache and DCache */
53/* will do writeback */
54void invalidate_idcache(void);
55
56#define HAVE_CPUCACHE_INVALIDATE
57#define HAVE_CPUCACHE_FLUSH
58
59#endif /* MMU_ARM_H */