diff options
author | Karl Kurbjun <kkurbjun@gmail.com> | 2007-10-23 03:29:15 +0000 |
---|---|---|
committer | Karl Kurbjun <kkurbjun@gmail.com> | 2007-10-23 03:29:15 +0000 |
commit | 5a9a2b7bc4e1e2a97ec731524bb7e127f5c8cacf (patch) | |
tree | 6933baa85655794d2b4b6df64681f8969b520297 /firmware/target/arm/mmu-arm.h | |
parent | 9d9225ed1ddefab985ab3ffd7e77bccf979f1c5b (diff) | |
download | rockbox-5a9a2b7bc4e1e2a97ec731524bb7e127f5c8cacf.tar.gz rockbox-5a9a2b7bc4e1e2a97ec731524bb7e127f5c8cacf.zip |
Unify the Gigabeat F/X and M:Robe MMU code while enabling it for the M:Robe
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15275 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/mmu-arm.h')
-rw-r--r-- | firmware/target/arm/mmu-arm.h | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/firmware/target/arm/mmu-arm.h b/firmware/target/arm/mmu-arm.h new file mode 100644 index 0000000000..b744305dbd --- /dev/null +++ b/firmware/target/arm/mmu-arm.h | |||
@@ -0,0 +1,43 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2006,2007 by Greg White | ||
11 | * | ||
12 | * All files in this archive are subject to the GNU General Public License. | ||
13 | * See the file COPYING in the source tree root for full license agreement. | ||
14 | * | ||
15 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
16 | * KIND, either express or implied. | ||
17 | * | ||
18 | ****************************************************************************/ | ||
19 | |||
20 | #define CACHE_ALL (1 << 3 | 1 << 2 ) | ||
21 | #define CACHE_NONE 0 | ||
22 | #define BUFFERED (1 << 2) | ||
23 | |||
24 | void ttb_init(void); | ||
25 | void enable_mmu(void); | ||
26 | void map_section(unsigned int pa, unsigned int va, int mb, int cache_flags); | ||
27 | |||
28 | /* Invalidate DCache for this range */ | ||
29 | /* Will do write back */ | ||
30 | void invalidate_dcache_range(const void *base, unsigned int size); | ||
31 | |||
32 | /* clean DCache for this range */ | ||
33 | /* forces DCache writeback for the specified range */ | ||
34 | void clean_dcache_range(const void *base, unsigned int size); | ||
35 | |||
36 | /* Dump DCache for this range */ | ||
37 | /* Will *NOT* do write back */ | ||
38 | void dump_dcache_range(const void *base, unsigned int size); | ||
39 | |||
40 | /* Cleans entire DCache */ | ||
41 | void clean_dcache(void); | ||
42 | |||
43 | void memory_init(void); | ||