summaryrefslogtreecommitdiff
path: root/firmware/target/arm/imx31/gigabeat-s
diff options
context:
space:
mode:
authorMichael Sevakis <jethead71@rockbox.org>2010-05-12 14:05:36 +0000
committerMichael Sevakis <jethead71@rockbox.org>2010-05-12 14:05:36 +0000
commit4d04132c76700b30708bf99fc0ef664e8bb0b58d (patch)
tree4a32974c7d75d93477413fa3fe8cd152709e3d8c /firmware/target/arm/imx31/gigabeat-s
parentf2df42ee91ee61f793dac4844255cb4ec9049621 (diff)
downloadrockbox-4d04132c76700b30708bf99fc0ef664e8bb0b58d.tar.gz
rockbox-4d04132c76700b30708bf99fc0ef664e8bb0b58d.zip
PCM bottom layer simplification. pcm_rec_peak_addr variable no longer has to be handled there. Driver can just return current pointer for recording peaks. A new define, HAVE_PCM_REC_DMA_ADDRESS, specifies that physical addresses are being used for recording and translation is needed before starting a new block. The drivers need not worry about aligning start and size nor should care if either will be zero. All this will be checked in the logical layer first.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25970 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/imx31/gigabeat-s')
-rw-r--r--firmware/target/arm/imx31/gigabeat-s/pcm-gigabeat-s.c27
1 files changed, 5 insertions, 22 deletions
diff --git a/firmware/target/arm/imx31/gigabeat-s/pcm-gigabeat-s.c b/firmware/target/arm/imx31/gigabeat-s/pcm-gigabeat-s.c
index c0651caf51..02051fad90 100644
--- a/firmware/target/arm/imx31/gigabeat-s/pcm-gigabeat-s.c
+++ b/firmware/target/arm/imx31/gigabeat-s/pcm-gigabeat-s.c
@@ -432,17 +432,13 @@ void pcm_rec_unlock(void)
432 } 432 }
433} 433}
434 434
435void pcm_record_more(void *start, size_t size) 435void pcm_rec_dma_record_more(void *start, size_t size)
436{ 436{
437 start = (void *)(((unsigned long)start + 3) & ~3);
438 size &= ~3;
439
440 /* Invalidate - buffer must be coherent */ 437 /* Invalidate - buffer must be coherent */
441 dump_dcache_range(start, size); 438 dump_dcache_range(start, size);
442 439
443 start = (void *)addr_virt_to_phys((unsigned long)start); 440 start = (void *)addr_virt_to_phys((unsigned long)start);
444 441
445 pcm_rec_peak_addr = start;
446 dma_rec_bd.buf_addr = start; 442 dma_rec_bd.buf_addr = start;
447 dma_rec_bd.mode.count = size; 443 dma_rec_bd.mode.count = size;
448 dma_rec_bd.mode.command = TRANSFER_16BIT; 444 dma_rec_bd.mode.command = TRANSFER_16BIT;
@@ -469,12 +465,6 @@ void pcm_rec_dma_start(void *addr, size_t size)
469{ 465{
470 pcm_rec_dma_stop(); 466 pcm_rec_dma_stop();
471 467
472 addr = (void *)(((unsigned long)addr + 3) & ~3);
473 size &= ~3;
474
475 if (size <= 0)
476 return;
477
478 if (!sdma_channel_reset(DMA_REC_CH_NUM)) 468 if (!sdma_channel_reset(DMA_REC_CH_NUM))
479 return; 469 return;
480 470
@@ -482,7 +472,6 @@ void pcm_rec_dma_start(void *addr, size_t size)
482 dump_dcache_range(addr, size); 472 dump_dcache_range(addr, size);
483 473
484 addr = (void *)addr_virt_to_phys((unsigned long)addr); 474 addr = (void *)addr_virt_to_phys((unsigned long)addr);
485 pcm_rec_peak_addr = addr;
486 dma_rec_bd.buf_addr = addr; 475 dma_rec_bd.buf_addr = addr;
487 dma_rec_bd.mode.count = size; 476 dma_rec_bd.mode.count = size;
488 dma_rec_bd.mode.command = TRANSFER_16BIT; 477 dma_rec_bd.mode.command = TRANSFER_16BIT;
@@ -524,10 +513,10 @@ void pcm_rec_dma_init(void)
524 sdma_channel_set_priority(DMA_REC_CH_NUM, DMA_REC_CH_PRIORITY); 513 sdma_channel_set_priority(DMA_REC_CH_NUM, DMA_REC_CH_PRIORITY);
525} 514}
526 515
527const void * pcm_rec_dma_get_peak_buffer(int *count) 516const void * pcm_rec_dma_get_peak_buffer(void)
528{ 517{
529 static unsigned long pda NOCACHEBSS_ATTR; 518 static unsigned long pda NOCACHEBSS_ATTR;
530 unsigned long buf, addr, end, bufend; 519 unsigned long buf, end, bufend;
531 int oldstatus; 520 int oldstatus;
532 521
533 /* read burst dma destination address register in channel context */ 522 /* read burst dma destination address register in channel context */
@@ -536,19 +525,13 @@ const void * pcm_rec_dma_get_peak_buffer(int *count)
536 oldstatus = disable_irq_save(); 525 oldstatus = disable_irq_save();
537 end = pda; 526 end = pda;
538 buf = (unsigned long)dma_rec_bd.buf_addr; 527 buf = (unsigned long)dma_rec_bd.buf_addr;
539 addr = (unsigned long)pcm_rec_peak_addr;
540 bufend = buf + dma_rec_bd.mode.count; 528 bufend = buf + dma_rec_bd.mode.count;
541 restore_irq(oldstatus); 529 restore_irq(oldstatus);
542 530
543 /* Be addresses are coherent (no buffer change during read) */ 531 /* Be addresses are coherent (no buffer change during read) */
544 if (addr >= buf && addr < bufend && 532 if (end >= buf && end < bufend)
545 end >= buf && end < bufend) 533 return (void *)(end & ~3);
546 {
547 *count = (end >> 2) - (addr >> 2);
548 return (void *)(addr & ~3);
549 }
550 534
551 *count = 0;
552 return NULL; 535 return NULL;
553} 536}
554 537