Gigabeat S mixer: Make some progress. Get the tick and core sleep working using the AVIC. Redo the startup code to remap from IRAM and not include the lcd driver frambuffer in the remapping (until it can be moved). Clean up LCD driver. For other misc. changes, see the diffs. Now it progresses to ATA init and fails with -11 but without crashing or hanging. Replace all bootloaders.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16216 a1c6a512-1295-4272-9138-f99709370657

1 files changed, 18 insertions, 2 deletions

diff --git a/firmware/target/arm/imx31/gigabeat-s/system-target.h b/firmware/target/arm/imx31/gigabeat-s/system-target.h
index e87b93b13a..1f7a2475af 100644
--- a/firmware/target/arm/imx31/gigabeat-s/system-target.h
+++ b/firmware/target/arm/imx31/gigabeat-s/system-target.h
@@ -19,15 +19,15 @@
 #ifndef SYSTEM_TARGET_H
 #define SYSTEM_TARGET_H
 
-#include "mmu-imx31.h"
 #include "system-arm.h"
+#include "mmu-arm.h"
 
 #define CPUFREQ_NORMAL 532000000
 
 static inline void udelay(unsigned int usecs)
 {
     volatile signed int stop = EPITCNT1 - usecs;
-    while (EPITCNT1 > stop);
+    while ((signed int)EPITCNT1 > stop);
 }
 
 #define __dbg_hw_info(...) 0
@@ -36,6 +36,22 @@ static inline void udelay(unsigned int usecs)
 #define HAVE_INVALIDATE_ICACHE
 static inline void invalidate_icache(void)
 {
+    long rd = 0;
+    asm volatile(
+        "mcr p15, 0, %0, c7, c10, 0 \n"
+        "mcr p15, 0, %0, c7, c5, 0  \n"
+        : : "r"(rd)
+    );
+}
+
+#define HAVE_FLUSH_ICACHE
+static inline void flush_icache(void)
+{
+    long rd = 0;
+    asm volatile (
+        "mcr p15, 0, %0, c7, c10, 0 \n"
+        : : "r"(rd)
+    );
 }
 
 struct ARM_REGS {