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authorAndree Buschmann <AndreeBuschmann@t-online.de>2010-01-03 10:19:43 +0000
committerAndree Buschmann <AndreeBuschmann@t-online.de>2010-01-03 10:19:43 +0000
commit56d972ad572fd270a117858a982b106a3175d8e0 (patch)
treed4d49a0cdbe343d39c128dd533ffb74987e29cca /firmware/target/arm/imx31/gigabeat-s/system-imx31.c
parent686c4e53ceaa3932224ed512b37b1e4fb10a247e (diff)
downloadrockbox-56d972ad572fd270a117858a982b106a3175d8e0.tar.gz
rockbox-56d972ad572fd270a117858a982b106a3175d8e0.zip
Fix tabs
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24153 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/imx31/gigabeat-s/system-imx31.c')
-rw-r--r--firmware/target/arm/imx31/gigabeat-s/system-imx31.c64
1 files changed, 32 insertions, 32 deletions
diff --git a/firmware/target/arm/imx31/gigabeat-s/system-imx31.c b/firmware/target/arm/imx31/gigabeat-s/system-imx31.c
index de39128497..65299cb8d0 100644
--- a/firmware/target/arm/imx31/gigabeat-s/system-imx31.c
+++ b/firmware/target/arm/imx31/gigabeat-s/system-imx31.c
@@ -250,48 +250,48 @@ void system_prepare_fw_start(void)
250 250
251inline void dumpregs(void) 251inline void dumpregs(void)
252{ 252{
253 asm volatile ("mov %0,r0\n\t" 253 asm volatile ("mov %0,r0\n\t"
254 "mov %1,r1\n\t" 254 "mov %1,r1\n\t"
255 "mov %2,r2\n\t" 255 "mov %2,r2\n\t"
256 "mov %3,r3": 256 "mov %3,r3":
257 "=r"(regs.r0),"=r"(regs.r1), 257 "=r"(regs.r0),"=r"(regs.r1),
258 "=r"(regs.r2),"=r"(regs.r3):); 258 "=r"(regs.r2),"=r"(regs.r3):);
259 259
260 asm volatile ("mov %0,r4\n\t" 260 asm volatile ("mov %0,r4\n\t"
261 "mov %1,r5\n\t" 261 "mov %1,r5\n\t"
262 "mov %2,r6\n\t" 262 "mov %2,r6\n\t"
263 "mov %3,r7": 263 "mov %3,r7":
264 "=r"(regs.r4),"=r"(regs.r5), 264 "=r"(regs.r4),"=r"(regs.r5),
265 "=r"(regs.r6),"=r"(regs.r7):); 265 "=r"(regs.r6),"=r"(regs.r7):);
266 266
267 asm volatile ("mov %0,r8\n\t" 267 asm volatile ("mov %0,r8\n\t"
268 "mov %1,r9\n\t" 268 "mov %1,r9\n\t"
269 "mov %2,r10\n\t" 269 "mov %2,r10\n\t"
270 "mov %3,r12": 270 "mov %3,r12":
271 "=r"(regs.r8),"=r"(regs.r9), 271 "=r"(regs.r8),"=r"(regs.r9),
272 "=r"(regs.r10),"=r"(regs.r11):); 272 "=r"(regs.r10),"=r"(regs.r11):);
273 273
274 asm volatile ("mov %0,r12\n\t" 274 asm volatile ("mov %0,r12\n\t"
275 "mov %1,sp\n\t" 275 "mov %1,sp\n\t"
276 "mov %2,lr\n\t" 276 "mov %2,lr\n\t"
277 "mov %3,pc\n" 277 "mov %3,pc\n"
278 "sub %3,%3,#8": 278 "sub %3,%3,#8":
279 "=r"(regs.r12),"=r"(regs.sp), 279 "=r"(regs.r12),"=r"(regs.sp),
280 "=r"(regs.lr),"=r"(regs.pc):); 280 "=r"(regs.lr),"=r"(regs.pc):);
281#ifdef HAVE_SERIAL 281#ifdef HAVE_SERIAL
282 dprintf("Register Dump :\n"); 282 dprintf("Register Dump :\n");
283 dprintf("R0=0x%x\tR1=0x%x\tR2=0x%x\tR3=0x%x\n",regs.r0,regs.r1,regs.r2,regs.r3); 283 dprintf("R0=0x%x\tR1=0x%x\tR2=0x%x\tR3=0x%x\n",regs.r0,regs.r1,regs.r2,regs.r3);
284 dprintf("R4=0x%x\tR5=0x%x\tR6=0x%x\tR7=0x%x\n",regs.r4,regs.r5,regs.r6,regs.r7); 284 dprintf("R4=0x%x\tR5=0x%x\tR6=0x%x\tR7=0x%x\n",regs.r4,regs.r5,regs.r6,regs.r7);
285 dprintf("R8=0x%x\tR9=0x%x\tR10=0x%x\tR11=0x%x\n",regs.r8,regs.r9,regs.r10,regs.r11); 285 dprintf("R8=0x%x\tR9=0x%x\tR10=0x%x\tR11=0x%x\n",regs.r8,regs.r9,regs.r10,regs.r11);
286 dprintf("R12=0x%x\tSP=0x%x\tLR=0x%x\tPC=0x%x\n",regs.r12,regs.sp,regs.lr,regs.pc); 286 dprintf("R12=0x%x\tSP=0x%x\tLR=0x%x\tPC=0x%x\n",regs.r12,regs.sp,regs.lr,regs.pc);
287 //dprintf("CPSR=0x%x\t\n",regs.cpsr); 287 //dprintf("CPSR=0x%x\t\n",regs.cpsr);
288#endif 288#endif
289 DEBUGF("Register Dump :\n"); 289 DEBUGF("Register Dump :\n");
290 DEBUGF("R0=0x%x\tR1=0x%x\tR2=0x%x\tR3=0x%x\n",regs.r0,regs.r1,regs.r2,regs.r3); 290 DEBUGF("R0=0x%x\tR1=0x%x\tR2=0x%x\tR3=0x%x\n",regs.r0,regs.r1,regs.r2,regs.r3);
291 DEBUGF("R4=0x%x\tR5=0x%x\tR6=0x%x\tR7=0x%x\n",regs.r4,regs.r5,regs.r6,regs.r7); 291 DEBUGF("R4=0x%x\tR5=0x%x\tR6=0x%x\tR7=0x%x\n",regs.r4,regs.r5,regs.r6,regs.r7);
292 DEBUGF("R8=0x%x\tR9=0x%x\tR10=0x%x\tR11=0x%x\n",regs.r8,regs.r9,regs.r10,regs.r11); 292 DEBUGF("R8=0x%x\tR9=0x%x\tR10=0x%x\tR11=0x%x\n",regs.r8,regs.r9,regs.r10,regs.r11);
293 DEBUGF("R12=0x%x\tSP=0x%x\tLR=0x%x\tPC=0x%x\n",regs.r12,regs.sp,regs.lr,regs.pc); 293 DEBUGF("R12=0x%x\tSP=0x%x\tLR=0x%x\tPC=0x%x\n",regs.r12,regs.sp,regs.lr,regs.pc);
294 //DEBUGF("CPSR=0x%x\t\n",regs.cpsr); 294 //DEBUGF("CPSR=0x%x\t\n",regs.cpsr);
295 295
296 } 296 }
297 297