summaryrefslogtreecommitdiff
path: root/firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c
diff options
context:
space:
mode:
authorMichael Sevakis <jethead71@rockbox.org>2009-03-12 06:31:40 +0000
committerMichael Sevakis <jethead71@rockbox.org>2009-03-12 06:31:40 +0000
commita1a332e04bf937d164746f06c8f71fab547fc271 (patch)
tree71fbd805fb2689746e69fabf980e88ed661ab893 /firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c
parentbc8cab4c24a0891182ac9711c67165a9e3373b1c (diff)
downloadrockbox-a1a332e04bf937d164746f06c8f71fab547fc271.tar.gz
rockbox-a1a332e04bf937d164746f06c8f71fab547fc271.zip
Gigabeat S: Implement MDMA and UDMA disk access for bootloader and main binary. Add a needed SDMA API to check channel errors. Increase audio DMA channels' priority as required. Reads and writes measure faster accross all test_disk tests and especially at 4KB and 1MB.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20299 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c')
-rw-r--r--firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c b/firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c
index 649186ab2e..deaa2a0dcd 100644
--- a/firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c
+++ b/firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c
@@ -29,6 +29,8 @@
29 29
30#define DMA_PLAY_CH_NUM 2 30#define DMA_PLAY_CH_NUM 2
31#define DMA_REC_CH_NUM 1 31#define DMA_REC_CH_NUM 1
32#define DMA_PLAY_CH_PRIORITY 6
33#define DMA_REC_CH_PRIORITY 6
32 34
33static struct buffer_descriptor dma_play_bd DEVBSS_ATTR; 35static struct buffer_descriptor dma_play_bd DEVBSS_ATTR;
34static struct channel_descriptor dma_play_cd DEVBSS_ATTR; 36static struct channel_descriptor dma_play_cd DEVBSS_ATTR;
@@ -126,6 +128,7 @@ void pcm_play_dma_init(void)
126 dma_play_cd.event_id1 = SDMA_REQ_SSI2_TX1; 128 dma_play_cd.event_id1 = SDMA_REQ_SSI2_TX1;
127 129
128 sdma_channel_init(DMA_PLAY_CH_NUM, &dma_play_cd, &dma_play_bd); 130 sdma_channel_init(DMA_PLAY_CH_NUM, &dma_play_cd, &dma_play_bd);
131 sdma_channel_set_priority(DMA_PLAY_CH_NUM, DMA_PLAY_CH_PRIORITY);
129 132
130 imx31_clkctl_module_clock_gating(CG_SSI1, CGM_ON_ALL); 133 imx31_clkctl_module_clock_gating(CG_SSI1, CGM_ON_ALL);
131 imx31_clkctl_module_clock_gating(CG_SSI2, CGM_ON_ALL); 134 imx31_clkctl_module_clock_gating(CG_SSI2, CGM_ON_ALL);
@@ -518,6 +521,7 @@ void pcm_rec_dma_init(void)
518 dma_rec_cd.event_id1 = SDMA_REQ_SSI1_RX1; 521 dma_rec_cd.event_id1 = SDMA_REQ_SSI1_RX1;
519 522
520 sdma_channel_init(DMA_REC_CH_NUM, &dma_rec_cd, &dma_rec_bd); 523 sdma_channel_init(DMA_REC_CH_NUM, &dma_rec_cd, &dma_rec_bd);
524 sdma_channel_set_priority(DMA_REC_CH_NUM, DMA_REC_CH_PRIORITY);
521} 525}
522 526
523const void * pcm_rec_dma_get_peak_buffer(int *count) 527const void * pcm_rec_dma_get_peak_buffer(int *count)