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authorMichael Sevakis <jethead71@rockbox.org>2010-04-09 01:21:53 +0000
committerMichael Sevakis <jethead71@rockbox.org>2010-04-09 01:21:53 +0000
commit7abf2b53a462612808d46d6d77a7f35261a0e5a3 (patch)
tree241304f7cd2b5d1c2a9e091fe56a33d2d2f8e816 /firmware/target/arm/imx31/gigabeat-s/ata-target.h
parent43304b87b0662d1619ac60e5297a1694aa580310 (diff)
downloadrockbox-7abf2b53a462612808d46d6d77a7f35261a0e5a3.tar.gz
rockbox-7abf2b53a462612808d46d6d77a7f35261a0e5a3.zip
Gigabeat S/i.MX31: Sort files in the /target tree into things that are SoC-generic (into /imx31) and player-specific (into /gigabeat-s, based upon current appearances). Move i2s clock init into the appropriate file. Housekeeping only-- no functional changes.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25547 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/imx31/gigabeat-s/ata-target.h')
-rw-r--r--firmware/target/arm/imx31/gigabeat-s/ata-target.h82
1 files changed, 0 insertions, 82 deletions
diff --git a/firmware/target/arm/imx31/gigabeat-s/ata-target.h b/firmware/target/arm/imx31/gigabeat-s/ata-target.h
deleted file mode 100644
index f7f84f82e9..0000000000
--- a/firmware/target/arm/imx31/gigabeat-s/ata-target.h
+++ /dev/null
@@ -1,82 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2006 by Linus Nielsen Feltzing
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#ifndef ATA_TARGET_H
22#define ATA_TARGET_H
23
24#ifdef BOOTLOADER
25#define ATA_DRIVER_CLOSE
26#endif
27
28/* Plain C read & write loops */
29/* They likely won't be used anyway since DMA potentially works for any
30 * sector number and alignment. */
31#define PREFER_C_READING
32#define PREFER_C_WRITING
33
34#ifdef HAVE_ATA_DMA
35#define ATA_MAX_MWDMA 2
36#define ATA_MAX_UDMA 4
37#endif
38
39#define ATA_DATA ATA_DRIVE_DATA
40#define ATA_ERROR ATA_DRIVE_FEATURES
41#define ATA_NSECTOR ATA_DRIVE_SECTOR_COUNT
42#define ATA_SECTOR ATA_DRIVE_SECTOR_NUM
43#define ATA_LCYL ATA_DRIVE_CYL_LOW
44#define ATA_HCYL ATA_DRIVE_CYL_HIGH
45#define ATA_SELECT ATA_DRIVE_CYL_HEAD
46#define ATA_COMMAND ATA_DRIVE_COMMAND
47#define ATA_CONTROL ATA_DRIVE_CONTROL
48
49#define STATUS_BSY 0x80
50#define STATUS_RDY 0x40
51#define STATUS_DF 0x20
52#define STATUS_DRQ 0x08
53#define STATUS_ERR 0x01
54#define ERROR_ABRT 0x04
55#define ERROR_IDNF 0x10
56
57#define WRITE_PATTERN1 0xa5
58#define WRITE_PATTERN2 0x5a
59#define WRITE_PATTERN3 0xaa
60#define WRITE_PATTERN4 0x55
61
62#define READ_PATTERN1 0xa5
63#define READ_PATTERN2 0x5a
64#define READ_PATTERN3 0xaa
65#define READ_PATTERN4 0x55
66
67#define READ_PATTERN1_MASK 0xff
68#define READ_PATTERN2_MASK 0xff
69#define READ_PATTERN3_MASK 0xff
70#define READ_PATTERN4_MASK 0xff
71
72#define SET_REG(reg,val) reg = (val)
73#define SET_16BITREG(reg,val) reg = (val)
74
75void ata_reset(void);
76void ata_device_init(void);
77bool ata_is_coldstart(void);
78
79#define ATA_SET_DEVICE_FEATURES
80void ata_set_pio_timings(int mode);
81
82#endif /* ATA_TARGET_H */