summaryrefslogtreecommitdiff
path: root/firmware/target/arm/imx31/crt0.S
diff options
context:
space:
mode:
authorMichael Sevakis <jethead71@rockbox.org>2010-06-11 14:39:35 +0000
committerMichael Sevakis <jethead71@rockbox.org>2010-06-11 14:39:35 +0000
commit60f843bf181fba3fc509955195ecea786cc002b2 (patch)
tree31399c08bb3ec25dd98318e6f23bcd2f4a0191d0 /firmware/target/arm/imx31/crt0.S
parentd5a27c2fb1d653bb133a57acacc06b9efdc3ce4c (diff)
downloadrockbox-60f843bf181fba3fc509955195ecea786cc002b2.tar.gz
rockbox-60f843bf181fba3fc509955195ecea786cc002b2.zip
Configure Gigabeat S with EABI compiler by default. Implement the INIT section that this enables (due to selective need for long calls). Remove pcm_postinit from INIT section since it's asynchronous. Disable strict aliasing on SPC codec for now just to shut it up.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26779 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/imx31/crt0.S')
-rw-r--r--firmware/target/arm/imx31/crt0.S16
1 files changed, 7 insertions, 9 deletions
diff --git a/firmware/target/arm/imx31/crt0.S b/firmware/target/arm/imx31/crt0.S
index d241fcb8ae..53e18c17df 100644
--- a/firmware/target/arm/imx31/crt0.S
+++ b/firmware/target/arm/imx31/crt0.S
@@ -231,20 +231,18 @@ remap_end:
231 bhi 1b 231 bhi 1b
232#endif /* BOOTLOADER */ 232#endif /* BOOTLOADER */
233 233
234#ifndef BOOTLOADER 234#ifdef HAVE_INIT_ATTR
235 /* Copy discardable SDMA code - loaded in the stack section 235 /* copy init data to codec buffer */
236 * and so must be done first. Destination is the plugin buffer 236 /* must be done before bss is zeroed */
237 * which is safe when SDMA init takes place just after kernel 237 ldr r4, =_initcopy
238 * init. */ 238 ldr r3, =_initend
239 ldr r4, =_sdmacodecopy 239 ldr r2, =_initstart
240 ldr r3, =_sdmacodeend
241 ldr r2, =_sdmacodestart
2421: 2401:
243 cmp r3, r2 241 cmp r3, r2
244 ldrhi r5, [r4], #4 242 ldrhi r5, [r4], #4
245 strhi r5, [r2], #4 243 strhi r5, [r2], #4
246 bhi 1b 244 bhi 1b
247#endif /* BOOTLOADER */ 245#endif /* HAVE_INIT_ATTR */
248 246
249 /* Initialise bss and ncbss sections to zero */ 247 /* Initialise bss and ncbss sections to zero */
250 ldr r2, =_edata 248 ldr r2, =_edata