i.MX31/Gigabeat S: This should fix stability problems. One problem was to start using the DVFS controller properly so that interrupts will be masked at the lowest and highest frequency indexes. Millions of useless interrupts were occurring at 132MHz because its index was 2, not 3, which masks it automatically when it can't go slower. Stopping the flood was enough to actually see the difference in general. IRQ must be disabled when fiddling with the CCM registers and only enabled when waiting for voltage ramp as having them enables also causes spurious DVFS ints. Implement interruptible ISR pro/epilogue more safely (always using IRQ stack even in SVC mode handling). Fix an improper inequality in DVFS code (which set regs for down when going up and v.v.). Misc. support changes. Have internal tables take less RAM.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25837 a1c6a512-1295-4272-9138-f99709370657

1 files changed, 11 insertions, 4 deletions

diff --git a/firmware/target/arm/imx31/avic-imx31.c b/firmware/target/arm/imx31/avic-imx31.c
index 51ba14d0b3..e349c97d82 100644
--- a/firmware/target/arm/imx31/avic-imx31.c
+++ b/firmware/target/arm/imx31/avic-imx31.c
@@ -119,8 +119,10 @@ void avic_init(void)
     for (i = 0; i < 8; i++)
         avic->nipriority[i] = 0;
 
-    /* Set NM bit to enable VIC */
-    avic->intcntl |= AVIC_INTCNTL_NM;
+    /* Set NM bit to enable VIC. Mask fast interrupts. Core arbiter rise
+     * for normal interrupts (for lowest latency). */
+    avic->intcntl |= AVIC_INTCNTL_NM | AVIC_INTCNTL_FIDIS |
+                   AVIC_INTCNTL_NIAD;
 
     /* Enable VE bit in CP15 Control reg to enable VIC */
     asm volatile (
@@ -213,7 +215,12 @@ void avic_set_int_type(enum IMX31_INT_LIST ints, enum INT_TYPE intstype)
     restore_interrupt(oldstatus);
 }
 
-void avic_set_ni_level(unsigned int level)
+void avic_set_ni_level(int level)
 {
-    AVIC_NIMASK = level > 0x1f ? 0x1f : level;
+    if (level < 0)
+        level = 0x1f; /* -1 */
+    else if (level > 15)
+        level = 15;
+
+    AVIC_NIMASK = level;
 }