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author | Amaury Pouly <amaury.pouly@gmail.com> | 2013-06-16 16:43:05 +0200 |
---|---|---|
committer | Amaury Pouly <amaury.pouly@gmail.com> | 2013-06-16 16:57:54 +0200 |
commit | d815cf3c79321eb5db66cd18a77e3713943560a8 (patch) | |
tree | a7305ac2a115bdec7b713e05a4b291b3224ab0c0 /firmware/target/arm/imx233 | |
parent | 8517cf8bed758120bdf95b5880d17ac277d21d74 (diff) | |
download | rockbox-d815cf3c79321eb5db66cd18a77e3713943560a8.tar.gz rockbox-d815cf3c79321eb5db66cd18a77e3713943560a8.zip |
imx233: rewrite lradc using new register headers
Change-Id: I06e4467c0ffe33145e6192528b074a23a8df67cc
Diffstat (limited to 'firmware/target/arm/imx233')
-rw-r--r-- | firmware/target/arm/imx233/adc-imx233.c | 4 | ||||
-rw-r--r-- | firmware/target/arm/imx233/creative-zenxfi2/adc-zenxfi2.c | 2 | ||||
-rw-r--r-- | firmware/target/arm/imx233/creative-zenxfi3/adc-zenxfi3.c | 2 | ||||
-rw-r--r-- | firmware/target/arm/imx233/lradc-imx233.c | 115 | ||||
-rw-r--r-- | firmware/target/arm/imx233/lradc-imx233.h | 129 | ||||
-rw-r--r-- | firmware/target/arm/imx233/sansa-fuzeplus/adc-fuzeplus.c | 2 | ||||
-rw-r--r-- | firmware/target/arm/imx233/touchscreen-imx233.c | 6 |
7 files changed, 99 insertions, 161 deletions
diff --git a/firmware/target/arm/imx233/adc-imx233.c b/firmware/target/arm/imx233/adc-imx233.c index 2d2f0de517..9b5af82d5d 100644 --- a/firmware/target/arm/imx233/adc-imx233.c +++ b/firmware/target/arm/imx233/adc-imx233.c | |||
@@ -51,10 +51,10 @@ static short adc_read_virtual(int c) | |||
51 | return imx233_lradc_read_battery_voltage(); | 51 | return imx233_lradc_read_battery_voltage(); |
52 | case IMX233_ADC_VDDIO: | 52 | case IMX233_ADC_VDDIO: |
53 | /* VddIO pin has a builtin 2:1 divide */ | 53 | /* VddIO pin has a builtin 2:1 divide */ |
54 | return adc_read_physical(HW_LRADC_CHANNEL_VDDIO, false); | 54 | return adc_read_physical(LRADC_SRC_VDDIO, false); |
55 | case IMX233_ADC_VDD5V: | 55 | case IMX233_ADC_VDD5V: |
56 | /* Vdd5V pin has a builtin 4:1 divide */ | 56 | /* Vdd5V pin has a builtin 4:1 divide */ |
57 | return adc_read_physical(HW_LRADC_CHANNEL_5V, false) * 2; | 57 | return adc_read_physical(LRADC_SRC_5V, false) * 2; |
58 | case IMX233_ADC_DIE_TEMP: | 58 | case IMX233_ADC_DIE_TEMP: |
59 | { | 59 | { |
60 | // don't block on second channel otherwise we might deadlock ! | 60 | // don't block on second channel otherwise we might deadlock ! |
diff --git a/firmware/target/arm/imx233/creative-zenxfi2/adc-zenxfi2.c b/firmware/target/arm/imx233/creative-zenxfi2/adc-zenxfi2.c index 50ed498cc6..9ec641be88 100644 --- a/firmware/target/arm/imx233/creative-zenxfi2/adc-zenxfi2.c +++ b/firmware/target/arm/imx233/creative-zenxfi2/adc-zenxfi2.c | |||
@@ -26,7 +26,7 @@ int imx233_adc_mapping[] = | |||
26 | [ADC_BATTERY] = IMX233_ADC_BATTERY, | 26 | [ADC_BATTERY] = IMX233_ADC_BATTERY, |
27 | [ADC_DIE_TEMP] = IMX233_ADC_DIE_TEMP, | 27 | [ADC_DIE_TEMP] = IMX233_ADC_DIE_TEMP, |
28 | [ADC_VDDIO] = IMX233_ADC_VDDIO, | 28 | [ADC_VDDIO] = IMX233_ADC_VDDIO, |
29 | [ADC_5V] = HW_LRADC_CHANNEL_5V, | 29 | [ADC_5V] = IMX233_ADC_VDD5V, |
30 | [ADC_BATT_TEMP] = IMX233_ADC_BATT_TEMP, | 30 | [ADC_BATT_TEMP] = IMX233_ADC_BATT_TEMP, |
31 | }; | 31 | }; |
32 | 32 | ||
diff --git a/firmware/target/arm/imx233/creative-zenxfi3/adc-zenxfi3.c b/firmware/target/arm/imx233/creative-zenxfi3/adc-zenxfi3.c index 6671c7202e..919e55200b 100644 --- a/firmware/target/arm/imx233/creative-zenxfi3/adc-zenxfi3.c +++ b/firmware/target/arm/imx233/creative-zenxfi3/adc-zenxfi3.c | |||
@@ -26,7 +26,7 @@ int imx233_adc_mapping[] = | |||
26 | [ADC_BATTERY] = IMX233_ADC_BATTERY, | 26 | [ADC_BATTERY] = IMX233_ADC_BATTERY, |
27 | [ADC_DIE_TEMP] = IMX233_ADC_DIE_TEMP, | 27 | [ADC_DIE_TEMP] = IMX233_ADC_DIE_TEMP, |
28 | [ADC_VDDIO] = IMX233_ADC_VDDIO, | 28 | [ADC_VDDIO] = IMX233_ADC_VDDIO, |
29 | [ADC_5V] = HW_LRADC_CHANNEL_5V, | 29 | [ADC_5V] = IMX233_ADC_VDD5V, |
30 | [ADC_BATT_TEMP] = IMX233_ADC_BATT_TEMP, | 30 | [ADC_BATT_TEMP] = IMX233_ADC_BATT_TEMP, |
31 | }; | 31 | }; |
32 | 32 | ||
diff --git a/firmware/target/arm/imx233/lradc-imx233.c b/firmware/target/arm/imx233/lradc-imx233.c index e6a3738b9c..4fe05f36f7 100644 --- a/firmware/target/arm/imx233/lradc-imx233.c +++ b/firmware/target/arm/imx233/lradc-imx233.c | |||
@@ -32,7 +32,7 @@ static struct channel_arbiter_t delay_arbiter; | |||
32 | static int battery_chan; | 32 | static int battery_chan; |
33 | static int battery_delay_chan; | 33 | static int battery_delay_chan; |
34 | /* irq callbacks */ | 34 | /* irq callbacks */ |
35 | static lradc_irq_fn_t irq_cb[HW_LRADC_NUM_CHANNELS]; | 35 | static lradc_irq_fn_t irq_cb[LRADC_NUM_CHANNELS]; |
36 | 36 | ||
37 | #define define_cb(x) \ | 37 | #define define_cb(x) \ |
38 | void INT_LRADC_CH##x(void) \ | 38 | void INT_LRADC_CH##x(void) \ |
@@ -62,55 +62,51 @@ void imx233_lradc_set_channel_irq_callback(int channel, lradc_irq_fn_t cb) | |||
62 | 62 | ||
63 | void imx233_lradc_setup_channel(int channel, bool div2, bool acc, int nr_samples, int src) | 63 | void imx233_lradc_setup_channel(int channel, bool div2, bool acc, int nr_samples, int src) |
64 | { | 64 | { |
65 | __REG_CLR(HW_LRADC_CHx(channel)) = HW_LRADC_CHx__NUM_SAMPLES_BM | HW_LRADC_CHx__ACCUMULATE; | 65 | HW_LRADC_CHn_CLR(channel) = BM_OR2(LRADC_CHn, NUM_SAMPLES, ACCUMULATE); |
66 | __REG_SET(HW_LRADC_CHx(channel)) = nr_samples << HW_LRADC_CHx__NUM_SAMPLES_BP | | 66 | HW_LRADC_CHn_SET(channel) = BF_OR2(LRADC_CHn, NUM_SAMPLES(nr_samples), ACCUMULATE(acc)); |
67 | acc << HW_LRADC_CHx__ACCUMULATE; | ||
68 | if(div2) | 67 | if(div2) |
69 | __REG_SET(HW_LRADC_CTRL2) = HW_LRADC_CTRL2__DIVIDE_BY_TWO(channel); | 68 | BF_SETV(LRADC_CTRL2, DIVIDE_BY_TWO, 1 << channel); |
70 | else | 69 | else |
71 | __REG_CLR(HW_LRADC_CTRL2) = HW_LRADC_CTRL2__DIVIDE_BY_TWO(channel); | 70 | BF_CLRV(LRADC_CTRL2, DIVIDE_BY_TWO, 1 << channel); |
72 | __REG_CLR(HW_LRADC_CTRL4) = HW_LRADC_CTRL4__LRADCxSELECT_BM(channel); | 71 | HW_LRADC_CTRL4_CLR = BM_LRADC_CTRL4_LRADCxSELECT(channel); |
73 | __REG_SET(HW_LRADC_CTRL4) = src << HW_LRADC_CTRL4__LRADCxSELECT_BP(channel); | 72 | HW_LRADC_CTRL4_SET = src << BP_LRADC_CTRL4_LRADCxSELECT(channel); |
74 | } | 73 | } |
75 | 74 | ||
76 | void imx233_lradc_setup_delay(int dchan, int trigger_lradc, int trigger_delays, | 75 | void imx233_lradc_setup_delay(int dchan, int trigger_lradc, int trigger_delays, |
77 | int loop_count, int delay) | 76 | int loop_count, int delay) |
78 | { | 77 | { |
79 | HW_LRADC_DELAYx(dchan) = | 78 | HW_LRADC_DELAYn(dchan) = BF_OR4(LRADC_DELAYn, TRIGGER_LRADCS(trigger_lradc), |
80 | trigger_lradc << HW_LRADC_DELAYx__TRIGGER_LRADCS_BP | | 79 | TRIGGER_DELAYS(trigger_delays), LOOP_COUNT(loop_count), DELAY(delay)); |
81 | trigger_delays << HW_LRADC_DELAYx__TRIGGER_DELAYS_BP | | ||
82 | loop_count << HW_LRADC_DELAYx__LOOP_COUNT_BP | | ||
83 | delay << HW_LRADC_DELAYx__DELAY_BP; | ||
84 | } | 80 | } |
85 | 81 | ||
86 | void imx233_lradc_clear_channel_irq(int channel) | 82 | void imx233_lradc_clear_channel_irq(int channel) |
87 | { | 83 | { |
88 | __REG_CLR(HW_LRADC_CTRL1) = HW_LRADC_CTRL1__LRADCx_IRQ(channel); | 84 | BF_CLR(LRADC_CTRL1, LRADCx_IRQ(channel)); |
89 | } | 85 | } |
90 | 86 | ||
91 | bool imx233_lradc_read_channel_irq(int channel) | 87 | bool imx233_lradc_read_channel_irq(int channel) |
92 | { | 88 | { |
93 | return HW_LRADC_CTRL1 & HW_LRADC_CTRL1__LRADCx_IRQ(channel); | 89 | return BF_RD(LRADC_CTRL1, LRADCx_IRQ(channel)); |
94 | } | 90 | } |
95 | 91 | ||
96 | void imx233_lradc_enable_channel_irq(int channel, bool enable) | 92 | void imx233_lradc_enable_channel_irq(int channel, bool enable) |
97 | { | 93 | { |
98 | if(enable) | 94 | if(enable) |
99 | __REG_SET(HW_LRADC_CTRL1) = HW_LRADC_CTRL1__LRADCx_IRQ_EN(channel); | 95 | BF_SET(LRADC_CTRL1, LRADCx_IRQ_EN(channel)); |
100 | else | 96 | else |
101 | __REG_CLR(HW_LRADC_CTRL1) = HW_LRADC_CTRL1__LRADCx_IRQ_EN(channel); | 97 | BF_CLR(LRADC_CTRL1, LRADCx_IRQ_EN(channel)); |
102 | imx233_lradc_clear_channel_irq(channel); | 98 | imx233_lradc_clear_channel_irq(channel); |
103 | } | 99 | } |
104 | 100 | ||
105 | void imx233_lradc_kick_channel(int channel) | 101 | void imx233_lradc_kick_channel(int channel) |
106 | { | 102 | { |
107 | imx233_lradc_clear_channel_irq(channel); | 103 | imx233_lradc_clear_channel_irq(channel); |
108 | __REG_SET(HW_LRADC_CTRL0) = HW_LRADC_CTRL0__SCHEDULE(channel); | 104 | BF_SETV(LRADC_CTRL0, SCHEDULE, 1 << channel); |
109 | } | 105 | } |
110 | 106 | ||
111 | void imx233_lradc_kick_delay(int dchan) | 107 | void imx233_lradc_kick_delay(int dchan) |
112 | { | 108 | { |
113 | __REG_SET(HW_LRADC_DELAYx(dchan)) = HW_LRADC_DELAYx__KICK; | 109 | BF_SETn(LRADC_DELAYn, dchan, KICK); |
114 | } | 110 | } |
115 | 111 | ||
116 | void imx233_lradc_wait_channel(int channel) | 112 | void imx233_lradc_wait_channel(int channel) |
@@ -122,12 +118,12 @@ void imx233_lradc_wait_channel(int channel) | |||
122 | 118 | ||
123 | int imx233_lradc_read_channel(int channel) | 119 | int imx233_lradc_read_channel(int channel) |
124 | { | 120 | { |
125 | return __XTRACT_EX(HW_LRADC_CHx(channel), HW_LRADC_CHx__VALUE); | 121 | return BF_RDn(LRADC_CHn, channel, VALUE); |
126 | } | 122 | } |
127 | 123 | ||
128 | void imx233_lradc_clear_channel(int channel) | 124 | void imx233_lradc_clear_channel(int channel) |
129 | { | 125 | { |
130 | __REG_CLR(HW_LRADC_CHx(channel)) = HW_LRADC_CHx__VALUE_BM; | 126 | BF_CLRn(LRADC_CHn, channel, VALUE); |
131 | } | 127 | } |
132 | 128 | ||
133 | int imx233_lradc_acquire_channel(int timeout) | 129 | int imx233_lradc_acquire_channel(int timeout) |
@@ -162,10 +158,10 @@ void imx233_lradc_reserve_delay(int channel) | |||
162 | 158 | ||
163 | int imx233_lradc_sense_die_temperature(int nmos_chan, int pmos_chan) | 159 | int imx233_lradc_sense_die_temperature(int nmos_chan, int pmos_chan) |
164 | { | 160 | { |
165 | imx233_lradc_setup_channel(nmos_chan, false, false, 0, HW_LRADC_CHANNEL_NMOS_THIN); | 161 | imx233_lradc_setup_channel(nmos_chan, false, false, 0, LRADC_SRC_NMOS_THIN); |
166 | imx233_lradc_setup_channel(pmos_chan, false, false, 0, HW_LRADC_CHANNEL_PMOS_THIN); | 162 | imx233_lradc_setup_channel(pmos_chan, false, false, 0, LRADC_SRC_PMOS_THIN); |
167 | // mux sensors | 163 | // mux sensors |
168 | __REG_CLR(HW_LRADC_CTRL2) = HW_LRADC_CTRL2__TEMPSENSE_PWD; | 164 | BF_CLR(LRADC_CTRL2, TEMPSENSE_PWD); |
169 | imx233_lradc_clear_channel(nmos_chan); | 165 | imx233_lradc_clear_channel(nmos_chan); |
170 | imx233_lradc_clear_channel(pmos_chan); | 166 | imx233_lradc_clear_channel(pmos_chan); |
171 | // schedule both channels | 167 | // schedule both channels |
@@ -175,7 +171,7 @@ int imx233_lradc_sense_die_temperature(int nmos_chan, int pmos_chan) | |||
175 | imx233_lradc_wait_channel(nmos_chan); | 171 | imx233_lradc_wait_channel(nmos_chan); |
176 | imx233_lradc_wait_channel(pmos_chan); | 172 | imx233_lradc_wait_channel(pmos_chan); |
177 | // mux sensors | 173 | // mux sensors |
178 | __REG_SET(HW_LRADC_CTRL2) = HW_LRADC_CTRL2__TEMPSENSE_PWD; | 174 | BF_SET(LRADC_CTRL2, TEMPSENSE_PWD); |
179 | // do the computation | 175 | // do the computation |
180 | int diff = imx233_lradc_read_channel(nmos_chan) - imx233_lradc_read_channel(pmos_chan); | 176 | int diff = imx233_lradc_read_channel(nmos_chan) - imx233_lradc_read_channel(pmos_chan); |
181 | // return diff * 1.012 / 4 | 177 | // return diff * 1.012 / 4 |
@@ -187,19 +183,19 @@ static void imx233_lradc_set_temp_isrc(int sensor, int value) | |||
187 | { | 183 | { |
188 | if(sensor < 0 || sensor > 1) | 184 | if(sensor < 0 || sensor > 1) |
189 | panicf("imx233_lradc_set_temp_isrc: invalid sensor"); | 185 | panicf("imx233_lradc_set_temp_isrc: invalid sensor"); |
190 | unsigned mask = HW_LRADC_CTRL2__TEMP_ISRCx_BM(sensor); | 186 | unsigned mask = sensor ? BM_LRADC_CTRL2_TEMP_ISRC0 : BM_LRADC_CTRL2_TEMP_ISRC1; |
191 | unsigned bp = HW_LRADC_CTRL2__TEMP_ISRCx_BP(sensor); | 187 | unsigned bp = sensor ? BP_LRADC_CTRL2_TEMP_ISRC0 : BP_LRADC_CTRL2_TEMP_ISRC1; |
192 | unsigned en = HW_LRADC_CTRL2__TEMP_SENSOR_IENABLEx(sensor); | 188 | unsigned en = sensor ? BM_LRADC_CTRL2_TEMP_SENSOR_IENABLE0 : BM_LRADC_CTRL2_TEMP_SENSOR_IENABLE1; |
193 | 189 | ||
194 | __REG_CLR(HW_LRADC_CTRL2) = mask; | 190 | HW_LRADC_CTRL2_CLR = mask; |
195 | __REG_SET(HW_LRADC_CTRL2) = value << bp; | 191 | HW_LRADC_CTRL2_SET = value << bp; |
196 | if(value != 0) | 192 | if(value != 0) |
197 | { | 193 | { |
198 | __REG_SET(HW_LRADC_CTRL2) = en; | 194 | HW_LRADC_CTRL2_SET = en; |
199 | udelay(100); | 195 | udelay(100); |
200 | } | 196 | } |
201 | else | 197 | else |
202 | __REG_CLR(HW_LRADC_CTRL2) = en; | 198 | HW_LRADC_CTRL2_CLR = en; |
203 | } | 199 | } |
204 | 200 | ||
205 | int imx233_lradc_sense_ext_temperature(int chan, int sensor) | 201 | int imx233_lradc_sense_ext_temperature(int chan, int sensor) |
@@ -208,7 +204,7 @@ int imx233_lradc_sense_ext_temperature(int chan, int sensor) | |||
208 | /* setup channel */ | 204 | /* setup channel */ |
209 | imx233_lradc_setup_channel(chan, false, false, 0, sensor); | 205 | imx233_lradc_setup_channel(chan, false, false, 0, sensor); |
210 | /* set current source to 300µA */ | 206 | /* set current source to 300µA */ |
211 | imx233_lradc_set_temp_isrc(sensor, HW_LRADC_CTRL2__TEMP_ISRC__300uA); | 207 | imx233_lradc_set_temp_isrc(sensor, BV_LRADC_CTRL2_TEMP_ISRC0__300); |
212 | /* read value and accumulate */ | 208 | /* read value and accumulate */ |
213 | int a = 0; | 209 | int a = 0; |
214 | for(int i = 0; i < EXT_TEMP_ACC_COUNT; i++) | 210 | for(int i = 0; i < EXT_TEMP_ACC_COUNT; i++) |
@@ -220,7 +216,7 @@ int imx233_lradc_sense_ext_temperature(int chan, int sensor) | |||
220 | } | 216 | } |
221 | /* setup channel for small accumulation */ | 217 | /* setup channel for small accumulation */ |
222 | /* set current source to 20µA */ | 218 | /* set current source to 20µA */ |
223 | imx233_lradc_set_temp_isrc(sensor, HW_LRADC_CTRL2__TEMP_ISRC__20uA); | 219 | imx233_lradc_set_temp_isrc(sensor, BV_LRADC_CTRL2_TEMP_ISRC0__20); |
224 | /* read value */ | 220 | /* read value */ |
225 | int b = 0; | 221 | int b = 0; |
226 | for(int i = 0; i < EXT_TEMP_ACC_COUNT; i++) | 222 | for(int i = 0; i < EXT_TEMP_ACC_COUNT; i++) |
@@ -231,72 +227,75 @@ int imx233_lradc_sense_ext_temperature(int chan, int sensor) | |||
231 | b += imx233_lradc_read_channel(chan); | 227 | b += imx233_lradc_read_channel(chan); |
232 | } | 228 | } |
233 | /* disable sensor current */ | 229 | /* disable sensor current */ |
234 | imx233_lradc_set_temp_isrc(sensor, HW_LRADC_CTRL2__TEMP_ISRC__0uA); | 230 | imx233_lradc_set_temp_isrc(sensor, BV_LRADC_CTRL2_TEMP_ISRC0__ZERO); |
235 | 231 | ||
236 | return (abs(b - a) / EXT_TEMP_ACC_COUNT) * 1104 / 1000; | 232 | return (abs(b - a) / EXT_TEMP_ACC_COUNT) * 1104 / 1000; |
237 | } | 233 | } |
238 | 234 | ||
239 | void imx233_lradc_setup_battery_conversion(bool automatic, unsigned long scale_factor) | 235 | void imx233_lradc_setup_battery_conversion(bool automatic, unsigned long scale_factor) |
240 | { | 236 | { |
241 | __REG_CLR(HW_LRADC_CONVERSION) = HW_LRADC_CONVERSION__SCALE_FACTOR_BM; | 237 | BF_CLR(LRADC_CONVERSION, SCALE_FACTOR); |
242 | __REG_SET(HW_LRADC_CONVERSION) = scale_factor; | 238 | BF_SETV(LRADC_CONVERSION, SCALE_FACTOR, scale_factor); |
243 | if(automatic) | 239 | if(automatic) |
244 | __REG_SET(HW_LRADC_CONVERSION) = HW_LRADC_CONVERSION__AUTOMATIC; | 240 | BF_SET(LRADC_CONVERSION, AUTOMATIC); |
245 | else | 241 | else |
246 | __REG_CLR(HW_LRADC_CONVERSION) = HW_LRADC_CONVERSION__AUTOMATIC; | 242 | BF_CLR(LRADC_CONVERSION, AUTOMATIC); |
247 | } | 243 | } |
248 | 244 | ||
249 | int imx233_lradc_read_battery_voltage(void) | 245 | int imx233_lradc_read_battery_voltage(void) |
250 | { | 246 | { |
251 | return __XTRACT(HW_LRADC_CONVERSION, SCALED_BATT_VOLTAGE); | 247 | return BF_RD(LRADC_CONVERSION, SCALED_BATT_VOLTAGE); |
252 | } | 248 | } |
253 | 249 | ||
254 | void imx233_lradc_setup_touch(bool xminus_enable, bool yminus_enable, | 250 | void imx233_lradc_setup_touch(bool xminus_enable, bool yminus_enable, |
255 | bool xplus_enable, bool yplus_enable, bool touch_detect) | 251 | bool xplus_enable, bool yplus_enable, bool touch_detect) |
256 | { | 252 | { |
257 | __FIELD_SET_CLR(HW_LRADC_CTRL0, XMINUS_ENABLE, xminus_enable); | 253 | HW_LRADC_CTRL0_CLR = BM_OR5(LRADC_CTRL0, XMINUS_ENABLE, YMINUS_ENABLE, |
258 | __FIELD_SET_CLR(HW_LRADC_CTRL0, YMINUS_ENABLE, yminus_enable); | 254 | XPLUS_ENABLE, YPLUS_ENABLE, TOUCH_DETECT_ENABLE); |
259 | __FIELD_SET_CLR(HW_LRADC_CTRL0, XPLUS_ENABLE, xplus_enable); | 255 | HW_LRADC_CTRL0_SET = BF_OR5(LRADC_CTRL0, XMINUS_ENABLE(xminus_enable), |
260 | __FIELD_SET_CLR(HW_LRADC_CTRL0, YPLUS_ENABLE, yplus_enable); | 256 | YMINUS_ENABLE(yminus_enable), XPLUS_ENABLE(xplus_enable), |
261 | __FIELD_SET_CLR(HW_LRADC_CTRL0, TOUCH_DETECT_ENABLE, touch_detect); | 257 | YPLUS_ENABLE(yplus_enable), TOUCH_DETECT_ENABLE(touch_detect)); |
262 | } | 258 | } |
263 | 259 | ||
264 | void imx233_lradc_enable_touch_detect_irq(bool enable) | 260 | void imx233_lradc_enable_touch_detect_irq(bool enable) |
265 | { | 261 | { |
266 | __FIELD_SET_CLR(HW_LRADC_CTRL1, TOUCH_DETECT_IRQ_EN, enable); | 262 | if(enable) |
263 | BF_SET(LRADC_CTRL1, TOUCH_DETECT_IRQ_EN); | ||
264 | else | ||
265 | BF_CLR(LRADC_CTRL1, TOUCH_DETECT_IRQ_EN); | ||
267 | imx233_lradc_clear_touch_detect_irq(); | 266 | imx233_lradc_clear_touch_detect_irq(); |
268 | } | 267 | } |
269 | 268 | ||
270 | void imx233_lradc_clear_touch_detect_irq(void) | 269 | void imx233_lradc_clear_touch_detect_irq(void) |
271 | { | 270 | { |
272 | __REG_CLR(HW_LRADC_CTRL1) = HW_LRADC_CTRL1__TOUCH_DETECT_IRQ; | 271 | BF_CLR(LRADC_CTRL1, TOUCH_DETECT_IRQ); |
273 | } | 272 | } |
274 | 273 | ||
275 | bool imx233_lradc_read_touch_detect(void) | 274 | bool imx233_lradc_read_touch_detect(void) |
276 | { | 275 | { |
277 | return HW_LRADC_STATUS & HW_LRADC_STATUS__TOUCH_DETECT_RAW; | 276 | return BF_RD(LRADC_STATUS, TOUCH_DETECT_RAW); |
278 | } | 277 | } |
279 | 278 | ||
280 | void imx233_lradc_init(void) | 279 | void imx233_lradc_init(void) |
281 | { | 280 | { |
282 | arbiter_init(&channel_arbiter, HW_LRADC_NUM_CHANNELS); | 281 | arbiter_init(&channel_arbiter, LRADC_NUM_CHANNELS); |
283 | arbiter_init(&delay_arbiter, HW_LRADC_NUM_DELAYS); | 282 | arbiter_init(&delay_arbiter, LRADC_NUM_DELAYS); |
284 | // enable block | 283 | // enable block |
285 | imx233_reset_block(&HW_LRADC_CTRL0); | 284 | imx233_reset_block(&HW_LRADC_CTRL0); |
286 | // disable ground ref | 285 | // disable ground ref |
287 | __REG_CLR(HW_LRADC_CTRL0) = HW_LRADC_CTRL0__ONCHIP_GROUNDREF; | 286 | BF_CLR(LRADC_CTRL0, ONCHIP_GROUNDREF); |
288 | // disable temperature sensors | 287 | // disable temperature sensors |
289 | __REG_CLR(HW_LRADC_CTRL2) = HW_LRADC_CTRL2__TEMP_SENSOR_IENABLE0 | | 288 | BF_CLR(LRADC_CTRL2, TEMP_SENSOR_IENABLE0); |
290 | HW_LRADC_CTRL2__TEMP_SENSOR_IENABLE1; | 289 | BF_CLR(LRADC_CTRL2, TEMP_SENSOR_IENABLE1); |
291 | __REG_SET(HW_LRADC_CTRL2) = HW_LRADC_CTRL2__TEMPSENSE_PWD; | 290 | BF_SET(LRADC_CTRL2, TEMPSENSE_PWD); |
292 | // set frequency | 291 | // set frequency |
293 | __REG_CLR(HW_LRADC_CTRL3) = HW_LRADC_CTRL3__CYCLE_TIME_BM; | 292 | BF_CLR(LRADC_CTRL3, CYCLE_TIME); |
294 | __REG_SET(HW_LRADC_CTRL3) = HW_LRADC_CTRL3__CYCLE_TIME__6MHz; | 293 | BF_SETV(LRADC_CTRL3, CYCLE_TIME_V, 6MHZ); |
295 | // setup battery | 294 | // setup battery |
296 | battery_chan = 7; | 295 | battery_chan = 7; |
297 | imx233_lradc_reserve_channel(battery_chan); | 296 | imx233_lradc_reserve_channel(battery_chan); |
298 | /* setup them for the simplest use: no accumulation, no division*/ | 297 | /* setup them for the simplest use: no accumulation, no division*/ |
299 | imx233_lradc_setup_channel(battery_chan, false, false, 0, HW_LRADC_CHANNEL_BATTERY); | 298 | imx233_lradc_setup_channel(battery_chan, false, false, 0, LRADC_SRC_BATTERY); |
300 | /* setup delay channel for battery for automatic reading and scaling */ | 299 | /* setup delay channel for battery for automatic reading and scaling */ |
301 | battery_delay_chan = 0; | 300 | battery_delay_chan = 0; |
302 | imx233_lradc_reserve_delay(battery_delay_chan); | 301 | imx233_lradc_reserve_delay(battery_delay_chan); |
@@ -307,5 +306,5 @@ void imx233_lradc_init(void) | |||
307 | 1 << battery_delay_chan, 0, 200); | 306 | 1 << battery_delay_chan, 0, 200); |
308 | imx233_lradc_kick_delay(battery_delay_chan); | 307 | imx233_lradc_kick_delay(battery_delay_chan); |
309 | /* enable automatic conversion, use Li-Ion type battery */ | 308 | /* enable automatic conversion, use Li-Ion type battery */ |
310 | imx233_lradc_setup_battery_conversion(true, HW_LRADC_CONVERSION__SCALE_FACTOR__LI_ION); | 309 | imx233_lradc_setup_battery_conversion(true, BV_LRADC_CONVERSION_SCALE_FACTOR__LI_ION); |
311 | } | 310 | } |
diff --git a/firmware/target/arm/imx233/lradc-imx233.h b/firmware/target/arm/imx233/lradc-imx233.h index f71843b3db..d1529f4266 100644 --- a/firmware/target/arm/imx233/lradc-imx233.h +++ b/firmware/target/arm/imx233/lradc-imx233.h | |||
@@ -28,101 +28,40 @@ | |||
28 | #include "system.h" | 28 | #include "system.h" |
29 | #include "system-target.h" | 29 | #include "system-target.h" |
30 | 30 | ||
31 | #define HW_LRADC_BASE 0x80050000 | 31 | #include "regs/regs-lradc.h" |
32 | 32 | ||
33 | #define HW_LRADC_CTRL0 (*(volatile uint32_t *)(HW_LRADC_BASE + 0x0)) | 33 | /** additional defines */ |
34 | #define HW_LRADC_CTRL0__XPLUS_ENABLE (1 << 16) | 34 | #define BP_LRADC_CTRL4_LRADCxSELECT(x) (4 * (x)) |
35 | #define HW_LRADC_CTRL0__YPLUS_ENABLE (1 << 17) | 35 | #define BM_LRADC_CTRL4_LRADCxSELECT(x) (0xf << (4 * (x))) |
36 | #define HW_LRADC_CTRL0__XMINUS_ENABLE (1 << 18) | 36 | |
37 | #define HW_LRADC_CTRL0__YMINUS_ENABLE (1 << 19) | 37 | #define BP_LRADC_CTRL1_LRADCx_IRQ(x) (x) |
38 | #define HW_LRADC_CTRL0__TOUCH_DETECT_ENABLE (1 << 20) | 38 | #define BM_LRADC_CTRL1_LRADCx_IRQ(x) (1 << (x)) |
39 | #define HW_LRADC_CTRL0__ONCHIP_GROUNDREF (1 << 21) | 39 | |
40 | #define HW_LRADC_CTRL0__SCHEDULE(x) (1 << (x)) | 40 | #define BP_LRADC_CTRL1_LRADCx_IRQ_EN(x) (16 + (x)) |
41 | 41 | #define BM_LRADC_CTRL1_LRADCx_IRQ_EN(x) (1 << (16 + (x))) | |
42 | #define HW_LRADC_CTRL1 (*(volatile uint32_t *)(HW_LRADC_BASE + 0x10)) | 42 | |
43 | #define HW_LRADC_CTRL1__LRADCx_IRQ(x) (1 << (x)) | 43 | #define LRADC_NUM_CHANNELS 8 |
44 | #define HW_LRADC_CTRL1__TOUCH_DETECT_IRQ (1 << 8) | 44 | #define LRADC_NUM_DELAYS 4 |
45 | #define HW_LRADC_CTRL1__LRADCx_IRQ_EN(x) (1 << ((x) + 16)) | 45 | |
46 | #define HW_LRADC_CTRL1__TOUCH_DETECT_IRQ_EN (1 << 24) | 46 | #define LRADC_SRC(x) (x) |
47 | 47 | #define LRADC_SRC_XPLUS LRADC_SRC(2) | |
48 | #define HW_LRADC_CTRL2 (*(volatile uint32_t *)(HW_LRADC_BASE + 0x20)) | 48 | #define LRADC_SRC_YPLUS LRADC_SRC(3) |
49 | #define HW_LRADC_CTRL2__TEMP_ISRC1_BP 4 | 49 | #define LRADC_SRC_XMINUS LRADC_SRC(4) |
50 | #define HW_LRADC_CTRL2__TEMP_ISRC1_BM 0xf0 | 50 | #define LRADC_SRC_YMINUS LRADC_SRC(5) |
51 | #define HW_LRADC_CTRL2__TEMP_ISRC0_BP 0 | 51 | #define LRADC_SRC_VDDIO LRADC_SRC(6) |
52 | #define HW_LRADC_CTRL2__TEMP_ISRC0_BM 0xf | 52 | #define LRADC_SRC_BATTERY LRADC_SRC(7) |
53 | #define HW_LRADC_CTRL2__TEMP_ISRCx_BP(x) (4 * (x)) | 53 | #define LRADC_SRC_PMOS_THIN LRADC_SRC(8) |
54 | #define HW_LRADC_CTRL2__TEMP_ISRCx_BM(x) (0xf << (4 * (x))) | 54 | #define LRADC_SRC_NMOS_THIN LRADC_SRC(9) |
55 | #define HW_LRADC_CTRL2__TEMP_ISRC__0uA 0 | 55 | #define LRADC_SRC_NMOS_THICK LRADC_SRC(10) |
56 | #define HW_LRADC_CTRL2__TEMP_ISRC__20uA 1 | 56 | #define LRADC_SRC_PMOS_THICK LRADC_SRC(11) |
57 | #define HW_LRADC_CTRL2__TEMP_ISRC__300uA 15 | 57 | #define LRADC_SRC_PMOS_THICK LRADC_SRC(11) |
58 | #define HW_LRADC_CTRL2__TEMP_SENSOR_IENABLE0 (1 << 8) | 58 | #define LRADC_SRC_USB_DP LRADC_SRC(12) |
59 | #define HW_LRADC_CTRL2__TEMP_SENSOR_IENABLE1 (1 << 9) | 59 | #define LRADC_SRC_USB_DN LRADC_SRC(13) |
60 | #define HW_LRADC_CTRL2__TEMP_SENSOR_IENABLEx(x) (1 << (8 + (x))) | 60 | #define LRADC_SRC_VBG LRADC_SRC(14) |
61 | #define HW_LRADC_CTRL2__TEMPSENSE_PWD (1 << 15) | 61 | #define LRADC_SRC_5V LRADC_SRC(15) |
62 | #define HW_LRADC_CTRL2__DIVIDE_BY_TWO(x) (1 << ((x) + 24)) | 62 | |
63 | 63 | /* frequency of the delay counter */ | |
64 | #define HW_LRADC_CTRL3 (*(volatile uint32_t *)(HW_LRADC_BASE + 0x30)) | 64 | #define LRADC_DELAY_FREQ 2000 |
65 | #define HW_LRADC_CTRL3__CYCLE_TIME_BM 0x300 | ||
66 | #define HW_LRADC_CTRL3__CYCLE_TIME_BP 8 | ||
67 | #define HW_LRADC_CTRL3__CYCLE_TIME__6MHz (0 << 8) | ||
68 | #define HW_LRADC_CTRL3__CYCLE_TIME__4MHz (1 << 8) | ||
69 | #define HW_LRADC_CTRL3__CYCLE_TIME__3MHz (2 << 8) | ||
70 | #define HW_LRADC_CTRL3__CYCLE_TIME__2MHz (3 << 8) | ||
71 | |||
72 | #define HW_LRADC_STATUS (*(volatile uint32_t *)(HW_LRADC_BASE + 0x40)) | ||
73 | #define HW_LRADC_STATUS__TOUCH_DETECT_RAW (1 << 0) | ||
74 | |||
75 | #define HW_LRADC_CHx(x) (*(volatile uint32_t *)(HW_LRADC_BASE + 0x50 + (x) * 0x10)) | ||
76 | #define HW_LRADC_CHx__NUM_SAMPLES_BM (0x1f << 24) | ||
77 | #define HW_LRADC_CHx__NUM_SAMPLES_BP 24 | ||
78 | #define HW_LRADC_CHx__ACCUMULATE 29 | ||
79 | #define HW_LRADC_CHx__VALUE_BM 0x3ffff | ||
80 | #define HW_LRADC_CHx__VALUE_BP 0 | ||
81 | |||
82 | #define HW_LRADC_DELAYx(x) (*(volatile uint32_t *)(HW_LRADC_BASE + 0xD0 + (x) * 0x10)) | ||
83 | #define HW_LRADC_DELAYx__DELAY_BP 0 | ||
84 | #define HW_LRADC_DELAYx__DELAY_BM 0x7ff | ||
85 | #define HW_LRADC_DELAYx__LOOP_COUNT_BP 11 | ||
86 | #define HW_LRADC_DELAYx__LOOP_COUNT_BM (0x1f << 11) | ||
87 | #define HW_LRADC_DELAYx__TRIGGER_DELAYS_BP 16 | ||
88 | #define HW_LRADC_DELAYx__TRIGGER_DELAYS_BM (0xf << 16) | ||
89 | #define HW_LRADC_DELAYx__KICK (1 << 20) | ||
90 | #define HW_LRADC_DELAYx__TRIGGER_LRADCS_BP 24 | ||
91 | #define HW_LRADC_DELAYx__TRIGGER_LRADCS_BM (0xff << 24) | ||
92 | |||
93 | #define HW_LRADC_CONVERSION (*(volatile uint32_t *)(HW_LRADC_BASE + 0x130)) | ||
94 | #define HW_LRADC_CONVERSION__SCALED_BATT_VOLTAGE_BP 0 | ||
95 | #define HW_LRADC_CONVERSION__SCALED_BATT_VOLTAGE_BM 0x3ff | ||
96 | #define HW_LRADC_CONVERSION__SCALE_FACTOR_BM (3 << 16) | ||
97 | #define HW_LRADC_CONVERSION__SCALE_FACTOR_BP 16 | ||
98 | #define HW_LRADC_CONVERSION__SCALE_FACTOR__LI_ION (2 << 16) | ||
99 | #define HW_LRADC_CONVERSION__AUTOMATIC (1 << 20) | ||
100 | |||
101 | #define HW_LRADC_CTRL4 (*(volatile uint32_t *)(HW_LRADC_BASE + 0x140)) | ||
102 | #define HW_LRADC_CTRL4__LRADCxSELECT_BM(x) (0xf << ((x) * 4)) | ||
103 | #define HW_LRADC_CTRL4__LRADCxSELECT_BP(x) ((x) * 4) | ||
104 | |||
105 | #define HW_LRADC_VERSION (*(volatile uint32_t *)(HW_LRADC_BASE + 0x150)) | ||
106 | |||
107 | #define HW_LRADC_NUM_CHANNELS 8 | ||
108 | #define HW_LRADC_NUM_DELAYS 4 | ||
109 | |||
110 | #define HW_LRADC_CHANNEL(x) (x) | ||
111 | #define HW_LRADC_CHANNEL_XPLUS HW_LRADC_CHANNEL(2) | ||
112 | #define HW_LRADC_CHANNEL_YPLUS HW_LRADC_CHANNEL(3) | ||
113 | #define HW_LRADC_CHANNEL_XMINUS HW_LRADC_CHANNEL(4) | ||
114 | #define HW_LRADC_CHANNEL_YMINUS HW_LRADC_CHANNEL(5) | ||
115 | #define HW_LRADC_CHANNEL_VDDIO HW_LRADC_CHANNEL(6) | ||
116 | #define HW_LRADC_CHANNEL_BATTERY HW_LRADC_CHANNEL(7) | ||
117 | #define HW_LRADC_CHANNEL_PMOS_THIN HW_LRADC_CHANNEL(8) | ||
118 | #define HW_LRADC_CHANNEL_NMOS_THIN HW_LRADC_CHANNEL(9) | ||
119 | #define HW_LRADC_CHANNEL_NMOS_THICK HW_LRADC_CHANNEL(10) | ||
120 | #define HW_LRADC_CHANNEL_PMOS_THICK HW_LRADC_CHANNEL(11) | ||
121 | #define HW_LRADC_CHANNEL_PMOS_THICK HW_LRADC_CHANNEL(11) | ||
122 | #define HW_LRADC_CHANNEL_USB_DP HW_LRADC_CHANNEL(12) | ||
123 | #define HW_LRADC_CHANNEL_USB_DN HW_LRADC_CHANNEL(13) | ||
124 | #define HW_LRADC_CHANNEL_VBG HW_LRADC_CHANNEL(14) | ||
125 | #define HW_LRADC_CHANNEL_5V HW_LRADC_CHANNEL(15) | ||
126 | 65 | ||
127 | typedef void (*lradc_irq_fn_t)(int chan); | 66 | typedef void (*lradc_irq_fn_t)(int chan); |
128 | 67 | ||
diff --git a/firmware/target/arm/imx233/sansa-fuzeplus/adc-fuzeplus.c b/firmware/target/arm/imx233/sansa-fuzeplus/adc-fuzeplus.c index cf420ae84f..5d04f6f6b0 100644 --- a/firmware/target/arm/imx233/sansa-fuzeplus/adc-fuzeplus.c +++ b/firmware/target/arm/imx233/sansa-fuzeplus/adc-fuzeplus.c | |||
@@ -28,7 +28,7 @@ int imx233_adc_mapping[] = | |||
28 | [ADC_VDDIO] = IMX233_ADC_VDDIO, | 28 | [ADC_VDDIO] = IMX233_ADC_VDDIO, |
29 | [ADC_5V] = IMX233_ADC_VDD5V, | 29 | [ADC_5V] = IMX233_ADC_VDD5V, |
30 | [ADC_BATT_TEMP] = IMX233_ADC_BATT_TEMP, | 30 | [ADC_BATT_TEMP] = IMX233_ADC_BATT_TEMP, |
31 | [ADC_CH2] = HW_LRADC_CHANNEL(2), | 31 | [ADC_CH2] = LRADC_SRC(2), |
32 | }; | 32 | }; |
33 | 33 | ||
34 | const char *imx233_adc_channel_name[] = | 34 | const char *imx233_adc_channel_name[] = |
diff --git a/firmware/target/arm/imx233/touchscreen-imx233.c b/firmware/target/arm/imx233/touchscreen-imx233.c index 475103c3d4..4f35110df7 100644 --- a/firmware/target/arm/imx233/touchscreen-imx233.c +++ b/firmware/target/arm/imx233/touchscreen-imx233.c | |||
@@ -82,13 +82,13 @@ static void enter_state(enum touch_state_t state) | |||
82 | imx233_lradc_enable_touch_detect_irq(true); | 82 | imx233_lradc_enable_touch_detect_irq(true); |
83 | break; | 83 | break; |
84 | case TOUCH_STATE_MEASURE_X: | 84 | case TOUCH_STATE_MEASURE_X: |
85 | kick_measure(true, false, false, HW_LRADC_CHANNEL_YPLUS); | 85 | kick_measure(true, false, false, LRADC_SRC_YPLUS); |
86 | break; | 86 | break; |
87 | case TOUCH_STATE_MEASURE_Y: | 87 | case TOUCH_STATE_MEASURE_Y: |
88 | kick_measure(false, true, false, HW_LRADC_CHANNEL_XPLUS); | 88 | kick_measure(false, true, false, LRADC_SRC_XPLUS); |
89 | break; | 89 | break; |
90 | case TOUCH_STATE_VERIFY: | 90 | case TOUCH_STATE_VERIFY: |
91 | kick_measure(false, false, true, HW_LRADC_CHANNEL_YPLUS); | 91 | kick_measure(false, false, true, LRADC_SRC_YPLUS); |
92 | break; | 92 | break; |
93 | } | 93 | } |
94 | } | 94 | } |