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authorAmaury Pouly <amaury.pouly@gmail.com>2013-06-16 17:19:20 +0200
committerAmaury Pouly <amaury.pouly@gmail.com>2013-06-16 18:21:48 +0200
commit3e8c2dc46d843575096e92bd82886c7d6d44855d (patch)
tree9857f96bf2fbcf0300b8269aecc55e3ced6176bd /firmware/target/arm/imx233/pwm-imx233.h
parent7c5b65b9d234f819447195e3f852d9b59a225813 (diff)
downloadrockbox-3e8c2dc46d843575096e92bd82886c7d6d44855d.tar.gz
rockbox-3e8c2dc46d843575096e92bd82886c7d6d44855d.zip
imx233: rewrite pwm using new registers
Change-Id: Ie222f0b25f4b8af9ccf21aecd82a7f4eba40aa3c
Diffstat (limited to 'firmware/target/arm/imx233/pwm-imx233.h')
-rw-r--r--firmware/target/arm/imx233/pwm-imx233.h35
1 files changed, 6 insertions, 29 deletions
diff --git a/firmware/target/arm/imx233/pwm-imx233.h b/firmware/target/arm/imx233/pwm-imx233.h
index 48c7811d47..c7ec4c27c5 100644
--- a/firmware/target/arm/imx233/pwm-imx233.h
+++ b/firmware/target/arm/imx233/pwm-imx233.h
@@ -23,38 +23,15 @@
23 23
24#include "system.h" 24#include "system.h"
25 25
26#define HW_PWM_BASE 0x80064000 26#include "regs/regs-pwm.h"
27 27
28#define HW_PWM_CTRL (*(volatile uint32_t *)(HW_PWM_BASE + 0x0)) 28/* fake field for simpler programming */
29#define HW_PWM_CTRL__PWMx_ENABLE(x) (1 << (x)) 29#define BP_PWM_CTRL_PWMx_ENABLE(x) (x)
30#define BM_PWM_CTRL_PWMx_ENABLE(x) (1 << (x))
30 31
31#define HW_PWM_ACTIVEx(x) (*(volatile uint32_t *)(HW_PWM_BASE + 0x10 + (x) * 0x20)) 32#define IMX233_PWM_MAX_PERIOD (1 << 16)
32#define HW_PWM_ACTIVEx__ACTIVE_BP 0
33#define HW_PWM_ACTIVEx__ACTIVE_BM 0xffff
34#define HW_PWM_ACTIVEx__INACTIVE_BP 16
35#define HW_PWM_ACTIVEx__INACTIVE_BM 0xffff0000
36 33
37#define HW_PWM_PERIODx(x) (*(volatile uint32_t *)(HW_PWM_BASE + 0x20 + (x) * 0x20)) 34#define IMX233_PWM_NR_CHANNELS 5
38#define HW_PWM_PERIODx__PERIOD_BP 0
39#define HW_PWM_PERIODx__PERIOD_BM 0xffff
40#define HW_PWM_PERIODx__ACTIVE_STATE_BP 16
41#define HW_PWM_PERIODx__ACTIVE_STATE_BM (0x3 << 16)
42#define HW_PWM_PERIODx__INACTIVE_STATE_BP 18
43#define HW_PWM_PERIODx__INACTIVE_STATE_BM (0x3 << 18)
44#define HW_PWM_PERIODx__CDIV_BP 20
45#define HW_PWM_PERIODx__CDIV_BM (0x7 << 20)
46#define HW_PWM_PERIODx__CDIV__DIV_1 0
47#define HW_PWM_PERIODx__CDIV__DIV_2 1
48#define HW_PWM_PERIODx__CDIV__DIV_4 2
49#define HW_PWM_PERIODx__CDIV__DIV_8 3
50#define HW_PWM_PERIODx__CDIV__DIV_16 4
51#define HW_PWM_PERIODx__CDIV__DIV_64 5
52#define HW_PWM_PERIODx__CDIV__DIV_256 6
53#define HW_PWM_PERIODx__CDIV__DIV_1024 7
54
55#define HW_PWM_PERIODx__STATE__HI_Z 0
56#define HW_PWM_PERIODx__STATE__LOW 2
57#define HW_PWM_PERIODx__STATE__HIGH 3
58 35
59#define IMX233_PWM_PIN_BANK(channel) 1 36#define IMX233_PWM_PIN_BANK(channel) 1
60#define IMX233_PWM_PIN(channel) (26 + (channel)) 37#define IMX233_PWM_PIN(channel) (26 + (channel))