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authorAmaury Pouly <amaury.pouly@gmail.com>2012-01-28 00:43:04 +0100
committerAmaury Pouly <amaury.pouly@gmail.com>2012-02-01 15:02:22 +0100
commit289440605aeda05b0722c64f8798906dcd0af41a (patch)
tree39cb9c309c1134e7c10114b5effdd2a1de22b4e6 /firmware/target/arm/imx233/power-imx233.h
parentc18a4e631690250024031be1b306e9003b2300ad (diff)
downloadrockbox-289440605aeda05b0722c64f8798906dcd0af41a.tar.gz
rockbox-289440605aeda05b0722c64f8798906dcd0af41a.zip
imx233/fuze+: set a few recommended power bits by Freescale, remove some uneeded headers, implement audio path selection for playback and radio
Change-Id: If926ead9b776504a58eb102fcc0e9acadf4f7379
Diffstat (limited to 'firmware/target/arm/imx233/power-imx233.h')
-rw-r--r--firmware/target/arm/imx233/power-imx233.h34
1 files changed, 34 insertions, 0 deletions
diff --git a/firmware/target/arm/imx233/power-imx233.h b/firmware/target/arm/imx233/power-imx233.h
index 368ca719da..3a2452ce19 100644
--- a/firmware/target/arm/imx233/power-imx233.h
+++ b/firmware/target/arm/imx233/power-imx233.h
@@ -52,6 +52,8 @@
52#define HW_POWER_5VCTRL__PWD_CHARGE_4P2 (1 << 20) 52#define HW_POWER_5VCTRL__PWD_CHARGE_4P2 (1 << 20)
53 53
54#define HW_POWER_MINPWR (*(volatile uint32_t *)(HW_POWER_BASE + 0x20)) 54#define HW_POWER_MINPWR (*(volatile uint32_t *)(HW_POWER_BASE + 0x20))
55#define HW_POWER_MINPWR__HALF_FETS (1 << 5)
56#define HW_POWER_MINPWR__DOUBLE_FETS (1 << 6)
55 57
56#define HW_POWER_CHARGE (*(volatile uint32_t *)(HW_POWER_BASE + 0x30)) 58#define HW_POWER_CHARGE (*(volatile uint32_t *)(HW_POWER_BASE + 0x30))
57#define HW_POWER_CHARGE__BATTCHRG_I_BP 0 59#define HW_POWER_CHARGE__BATTCHRG_I_BP 0
@@ -129,6 +131,27 @@
129#define HW_POWER_MISC__FREQSEL__21p6MHz 6 131#define HW_POWER_MISC__FREQSEL__21p6MHz 6
130#define HW_POWER_MISC__FREQSEL__17p28MHz 7 132#define HW_POWER_MISC__FREQSEL__17p28MHz 7
131 133
134#define HW_POWER_LOOPCTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0xb0))
135#define HW_POWER_LOOPCTRL__DC_C_BP 0
136#define HW_POWER_LOOPCTRL__DC_C_BM 0x3
137#define HW_POWER_LOOPCTRL__DC_R_BP 4
138#define HW_POWER_LOOPCTRL__DC_R_BM 0xf0
139#define HW_POWER_LOOPCTRL__DC_FF_BP 8
140#define HW_POWER_LOOPCTRL__DC_FF_BM (0x7 << 8)
141#define HW_POWER_LOOPCTRL__EN_RCSCALE_BP 12
142#define HW_POWER_LOOPCTRL__EN_RCSCALE_BM (0x3 << 12)
143#define HW_POWER_LOOPCTRL__EN_RCSCALE__DISABLED 0
144#define HW_POWER_LOOPCTRL__EN_RCSCALE__2X 1
145#define HW_POWER_LOOPCTRL__EN_RCSCALE__4X 2
146#define HW_POWER_LOOPCTRL__EN_RCSCALE__8X 3
147#define HW_POWER_LOOPCTRL__RCSCALE_THRESH (1 << 14)
148#define HW_POWER_LOOPCTRL__DF_HYST_THRESH (1 << 15)
149#define HW_POWER_LOOPCTRL__CM_HYST_THRESH (1 << 16)
150#define HW_POWER_LOOPCTRL__EN_DF_HYST (1 << 17)
151#define HW_POWER_LOOPCTRL__EN_CM_HYST (1 << 18)
152#define HW_POWER_LOOPCTRL__HYST_SIGN (1 << 19)
153#define HW_POWER_LOOPCTRL__TOGGLE_DIF (1 << 20)
154
132#define HW_POWER_STS (*(volatile uint32_t *)(HW_POWER_BASE + 0xc0)) 155#define HW_POWER_STS (*(volatile uint32_t *)(HW_POWER_BASE + 0xc0))
133#define HW_POWER_STS__VBUSVALID (1 << 1) 156#define HW_POWER_STS__VBUSVALID (1 << 1)
134#define HW_POWER_STS__CHRGSTS (1 << 11) 157#define HW_POWER_STS__CHRGSTS (1 << 11)
@@ -148,6 +171,17 @@ void imx233_power_set_charge_current(unsigned current); /* in mA */
148void imx233_power_set_stop_current(unsigned current); /* in mA */ 171void imx233_power_set_stop_current(unsigned current); /* in mA */
149void imx233_power_enable_batadj(bool enable); 172void imx233_power_enable_batadj(bool enable);
150 173
174static inline void imx233_power_set_dcdc_freq(bool pll, unsigned freq)
175{
176 HW_POWER_MISC &= ~(HW_POWER_MISC__SEL_PLLCLK | HW_POWER_MISC__FREQSEL_BM);
177 /* WARNING: HW_POWER_MISC does have a SET/CLR variant ! */
178 if(pll)
179 {
180 HW_POWER_MISC |= freq << HW_POWER_MISC__FREQSEL_BP;
181 HW_POWER_MISC |= HW_POWER_MISC__SEL_PLLCLK;
182 }
183}
184
151struct imx233_power_info_t 185struct imx233_power_info_t
152{ 186{
153 int vddd; /* in mV */ 187 int vddd; /* in mV */