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authorAmaury Pouly <amaury.pouly@gmail.com>2013-07-07 17:29:41 +0200
committerAmaury Pouly <amaury.pouly@gmail.com>2013-07-07 17:36:21 +0200
commit3afcb53fb94b7bb937147236f338dd89afb781d0 (patch)
treefca31ca98a49047e49a0f317abdc00ede26599f3 /firmware/target/arm/imx233/power-imx233.c
parent659febc749627a92c59f2d765da59eb9c995c50d (diff)
downloadrockbox-3afcb53fb94b7bb937147236f338dd89afb781d0.tar.gz
rockbox-3afcb53fb94b7bb937147236f338dd89afb781d0.zip
imx233: rework power management
The current code was spreaded over power and powermgmt which made it behave strangely, especially since there are relationships between power management and frequency scaling. The new code makes sure power management is initialised before frequency scaling starts. It also makes sure to start from a known state, thus fixing potential issue when the bootloader stops in a trickle state where DCDC is improperly configured. Change-Id: Ibded2e590e108f6c98daa52d2cf1bd28763c8923
Diffstat (limited to 'firmware/target/arm/imx233/power-imx233.c')
-rw-r--r--firmware/target/arm/imx233/power-imx233.c21
1 files changed, 0 insertions, 21 deletions
diff --git a/firmware/target/arm/imx233/power-imx233.c b/firmware/target/arm/imx233/power-imx233.c
index 5041c3b7fc..ccbd12b4ef 100644
--- a/firmware/target/arm/imx233/power-imx233.c
+++ b/firmware/target/arm/imx233/power-imx233.c
@@ -146,27 +146,6 @@ void imx233_power_init(void)
146 BF_SET(POWER_CTRL, ENIRQ_VDD5V_GT_VDDIO); 146 BF_SET(POWER_CTRL, ENIRQ_VDD5V_GT_VDDIO);
147#endif 147#endif
148 imx233_icoll_enable_interrupt(INT_SRC_VDD5V, true); 148 imx233_icoll_enable_interrupt(INT_SRC_VDD5V, true);
149 /* setup linear regulator offsets to 25 mV below to prevent contention between
150 * linear regulators and DCDC */
151#if IMX233_SUBTARGET >= 3700
152 BF_WR(POWER_VDDDCTRL, LINREG_OFFSET, 2);
153 BF_WR(POWER_VDDACTRL, LINREG_OFFSET, 2);
154 BF_WR(POWER_VDDIOCTRL, LINREG_OFFSET, 2);
155 /* enable DCDC (more efficient) */
156 BF_SET(POWER_5VCTRL, ENABLE_DCDC);
157#else
158 BF_SET(POWER_5VCTRL, LINREG_OFFSET);
159 BF_SET(POWER_5VCTRL, EN_DCDC1);
160 BF_SET(POWER_5VCTRL, EN_DCDC2);
161#endif
162
163#if IMX233_SUBTARGET >= 3780
164 /* enable a few bits controlling the DC-DC as recommended by Freescale */
165 BF_SET(POWER_LOOPCTRL, TOGGLE_DIF);
166 BF_SET(POWER_LOOPCTRL, EN_CM_HYST);
167 BF_CLR(POWER_LOOPCTRL, EN_RCSCALE);
168 BF_SETV(POWER_LOOPCTRL, EN_RCSCALE, 1);
169#endif
170} 149}
171 150
172void power_init(void) 151void power_init(void)