summaryrefslogtreecommitdiff
path: root/firmware/target/arm/imx233/pinctrl-imx233.c
diff options
context:
space:
mode:
authorAmaury Pouly <amaury.pouly@gmail.com>2013-06-16 16:56:34 +0200
committerAmaury Pouly <amaury.pouly@gmail.com>2013-06-16 16:58:01 +0200
commitb73fda3a05f78a3ce78708e319f2eb719fd55719 (patch)
tree8d0fa019f3d6d688fcc925fe7d838e21480b78c3 /firmware/target/arm/imx233/pinctrl-imx233.c
parent6f0eaf482714d4a17a6d68abdb83121bbf78f501 (diff)
downloadrockbox-b73fda3a05f78a3ce78708e319f2eb719fd55719.tar.gz
rockbox-b73fda3a05f78a3ce78708e319f2eb719fd55719.zip
imx233: rewrite pinctrl using new registers
Change-Id: I907a0b599ef65061360c215580f96f59b78b615b
Diffstat (limited to 'firmware/target/arm/imx233/pinctrl-imx233.c')
-rw-r--r--firmware/target/arm/imx233/pinctrl-imx233.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/firmware/target/arm/imx233/pinctrl-imx233.c b/firmware/target/arm/imx233/pinctrl-imx233.c
index d667e8d25c..3d8a6cfe54 100644
--- a/firmware/target/arm/imx233/pinctrl-imx233.c
+++ b/firmware/target/arm/imx233/pinctrl-imx233.c
@@ -66,7 +66,7 @@ static pin_irq_cb_t pin_cb[3][32]; /* 3 banks, 32 pins/bank */
66 66
67static void INT_GPIO(int bank) 67static void INT_GPIO(int bank)
68{ 68{
69 uint32_t fire = HW_PINCTRL_IRQSTAT(bank) & HW_PINCTRL_IRQEN(bank); 69 uint32_t fire = HW_PINCTRL_IRQSTATn(bank) & HW_PINCTRL_IRQENn(bank);
70 for(int pin = 0; pin < 32; pin++) 70 for(int pin = 0; pin < 32; pin++)
71 if(fire & (1 << pin)) 71 if(fire & (1 << pin))
72 { 72 {
@@ -95,22 +95,22 @@ void INT_GPIO2(void)
95void imx233_setup_pin_irq(int bank, int pin, bool enable_int, 95void imx233_setup_pin_irq(int bank, int pin, bool enable_int,
96 bool level, bool polarity, pin_irq_cb_t cb) 96 bool level, bool polarity, pin_irq_cb_t cb)
97{ 97{
98 __REG_CLR(HW_PINCTRL_PIN2IRQ(bank)) = 1 << pin; 98 HW_PINCTRL_PIN2IRQn_CLR(bank) = 1 << pin;
99 __REG_CLR(HW_PINCTRL_IRQEN(bank)) = 1 << pin; 99 HW_PINCTRL_IRQENn_CLR(bank) = 1 << pin;
100 __REG_CLR(HW_PINCTRL_IRQSTAT(bank))= 1 << pin; 100 HW_PINCTRL_IRQSTATn_CLR(bank) = 1 << pin;
101 pin_cb[bank][pin] = cb; 101 pin_cb[bank][pin] = cb;
102 if(enable_int) 102 if(enable_int)
103 { 103 {
104 if(level) 104 if(level)
105 __REG_SET(HW_PINCTRL_IRQLEVEL(bank)) = 1 << pin; 105 HW_PINCTRL_IRQLEVELn_SET(bank) = 1 << pin;
106 else 106 else
107 __REG_CLR(HW_PINCTRL_IRQLEVEL(bank)) = 1 << pin; 107 HW_PINCTRL_IRQLEVELn_CLR(bank) = 1 << pin;
108 if(polarity) 108 if(polarity)
109 __REG_SET(HW_PINCTRL_IRQPOL(bank)) = 1 << pin; 109 HW_PINCTRL_IRQPOLn_SET(bank) = 1 << pin;
110 else 110 else
111 __REG_CLR(HW_PINCTRL_IRQPOL(bank)) = 1 << pin; 111 HW_PINCTRL_IRQPOLn_CLR(bank) = 1 << pin;
112 __REG_SET(HW_PINCTRL_PIN2IRQ(bank)) = 1 << pin; 112 HW_PINCTRL_PIN2IRQn_SET(bank) = 1 << pin;
113 __REG_SET(HW_PINCTRL_IRQEN(bank)) = 1 << pin; 113 HW_PINCTRL_IRQENn_SET(bank) = 1 << pin;
114 imx233_icoll_enable_interrupt(INT_SRC_GPIO(bank), true); 114 imx233_icoll_enable_interrupt(INT_SRC_GPIO(bank), true);
115 } 115 }
116} 116}