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author | Amaury Pouly <amaury.pouly@gmail.com> | 2012-05-19 13:30:02 +0200 |
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committer | Amaury Pouly <amaury.pouly@gmail.com> | 2012-05-19 16:10:52 +0200 |
commit | bbbfd9f3d389a2d6f9049802ddd5f9b11870bc7a (patch) | |
tree | d364e1e942e0ecfa7e4a0ba998724570ee44af3b /firmware/target/arm/imx233/dma-imx233.h | |
parent | d57e1e048ebb6a9b2eb005ffda6f551023b54b10 (diff) | |
download | rockbox-bbbfd9f3d389a2d6f9049802ddd5f9b11870bc7a.tar.gz rockbox-bbbfd9f3d389a2d6f9049802ddd5f9b11870bc7a.zip |
imx233: add dma channel defines
Change-Id: I462cfa338ded85aca4bb00ec91f144bb17136dbe
Diffstat (limited to 'firmware/target/arm/imx233/dma-imx233.h')
-rw-r--r-- | firmware/target/arm/imx233/dma-imx233.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/firmware/target/arm/imx233/dma-imx233.h b/firmware/target/arm/imx233/dma-imx233.h index 05baea989c..fe220dc5f7 100644 --- a/firmware/target/arm/imx233/dma-imx233.h +++ b/firmware/target/arm/imx233/dma-imx233.h | |||
@@ -36,6 +36,7 @@ | |||
36 | 36 | ||
37 | /* APHB channels */ | 37 | /* APHB channels */ |
38 | #define HW_APBH_SSP(ssp) ssp | 38 | #define HW_APBH_SSP(ssp) ssp |
39 | #define HW_APBH_NAND(dev) (4 + (ssp)) | ||
39 | 40 | ||
40 | #define HW_APBH_CTRL0 (*(volatile uint32_t *)(HW_APBH_BASE + 0x0)) | 41 | #define HW_APBH_CTRL0 (*(volatile uint32_t *)(HW_APBH_BASE + 0x0)) |
41 | #define HW_APBH_CTRL0__FREEZE_CHANNEL(i) (1 << (i)) | 42 | #define HW_APBH_CTRL0__FREEZE_CHANNEL(i) (1 << (i)) |
@@ -160,6 +161,7 @@ struct imx233_dma_info_t | |||
160 | #define APB_AUDIO_ADC APBX_DMA_CHANNEL(HW_APBX_AUDIO_ADC) | 161 | #define APB_AUDIO_ADC APBX_DMA_CHANNEL(HW_APBX_AUDIO_ADC) |
161 | #define APB_AUDIO_DAC APBX_DMA_CHANNEL(HW_APBX_AUDIO_DAC) | 162 | #define APB_AUDIO_DAC APBX_DMA_CHANNEL(HW_APBX_AUDIO_DAC) |
162 | #define APB_I2C APBX_DMA_CHANNEL(HW_APBX_I2C) | 163 | #define APB_I2C APBX_DMA_CHANNEL(HW_APBX_I2C) |
164 | #define APB_NAND(dev) APBH_DMA_CHANNEL(HW_APBH_NAND(dev)) | ||
163 | 165 | ||
164 | #define HW_APB_CHx_CMD__COMMAND_BM 0x3 | 166 | #define HW_APB_CHx_CMD__COMMAND_BM 0x3 |
165 | #define HW_APB_CHx_CMD__COMMAND__NO_XFER 0 | 167 | #define HW_APB_CHx_CMD__COMMAND__NO_XFER 0 |