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authorAmaury Pouly <pamaury@rockbox.org>2011-09-05 11:29:32 +0000
committerAmaury Pouly <pamaury@rockbox.org>2011-09-05 11:29:32 +0000
commit7d4fed53cc1e8b0e5aa250ebea3a1b53fc3a50b2 (patch)
tree236a72d742675715fd599daaa98af8f4eeb45ad8 /firmware/target/arm/imx233/boot.lds
parent11e1f71612f6c1ef8c17f8ceea17f69fd4bc7b02 (diff)
downloadrockbox-7d4fed53cc1e8b0e5aa250ebea3a1b53fc3a50b2.tar.gz
rockbox-7d4fed53cc1e8b0e5aa250ebea3a1b53fc3a50b2.zip
imx233:fuze+: major memory and usb rework
- now identity map dram uncached and have a cached and buffered virtual alias - rework dma to handle virtual to physical pointers conversion - fix lcd frame pointer - implement usb detection properly - implement bootloader usb properly - allow the bootloader to disable MMC windowing (useful for recovery) git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30432 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/imx233/boot.lds')
-rw-r--r--firmware/target/arm/imx233/boot.lds16
1 files changed, 15 insertions, 1 deletions
diff --git a/firmware/target/arm/imx233/boot.lds b/firmware/target/arm/imx233/boot.lds
index 8e4f2016df..fb6ffdcf23 100644
--- a/firmware/target/arm/imx233/boot.lds
+++ b/firmware/target/arm/imx233/boot.lds
@@ -9,7 +9,8 @@ STARTUP(target/arm/imx233/crt0.o)
9MEMORY 9MEMORY
10{ 10{
11 IRAM : ORIGIN = IRAM_ORIG, LENGTH = IRAM_SIZE 11 IRAM : ORIGIN = IRAM_ORIG, LENGTH = IRAM_SIZE
12 DRAM : ORIGIN = DRAM_ORIG, LENGTH = DRAM_SIZE - TTB_SIZE - FRAME_SIZE 12 DRAM : ORIGIN = CACHED_DRAM_ADDR, LENGTH = DRAM_SIZE - TTB_SIZE - FRAME_SIZE
13 UNCACHED_DRAM : ORIGIN = UNCACHED_DRAM_ADDR, LENGTH = DRAM_SIZE - TTB_SIZE - FRAME_SIZE
13} 14}
14 15
15SECTIONS 16SECTIONS
@@ -57,10 +58,23 @@ SECTIONS
57 stackend = .; 58 stackend = .;
58 } > DRAM 59 } > DRAM
59 60
61 /* treat .bss and .ncbss as a single section */
60 .bss (NOLOAD) : 62 .bss (NOLOAD) :
61 { 63 {
62 _edata = .; 64 _edata = .;
63 *(.bss*); 65 *(.bss*);
66 } > DRAM
67
68 /* align on cache size boundary to avoid mixing cached and noncached stuff */
69 .ncbss . - CACHED_DRAM_ADDR + UNCACHED_DRAM_ADDR (NOLOAD) :
70 {
71 . = ALIGN(CACHEALIGN_SIZE);
72 *(.ncbss*)
73 . = ALIGN(CACHEALIGN_SIZE);
74 } AT> DRAM
75
76 .bssendadr . - UNCACHED_DRAM_ADDR + CACHED_DRAM_ADDR (NOLOAD) :
77 {
64 _end = .; 78 _end = .;
65 } > DRAM 79 } > DRAM
66} 80}